[Arm-netbook] parallella

luke.leighton luke.leighton at gmail.com
Mon Jul 29 11:49:13 BST 2013

On Mon, Jul 29, 2013 at 3:35 AM, Ken Phillis Jr <kphillisjr at gmail.com> wrote:
> On Sat, Jul 27, 2013 at 5:32 PM, luke.leighton <luke.leighton at gmail.com> wrote:
>> On Sat, Jul 27, 2013 at 11:15 PM, Ken Phillis Jr <kphillisjr at gmail.com> wrote:
>>> I think the solution is probably looking into a hybrid setup where you
>>> use a Zynq XC7Z010 or Zynq XC7Z020 soc as a base and then add a
>>> secondary ( cheaper/lower-powered ) FPGA to handle things like Sata
>>> and power.
>>  yehhh, but it doesn't compare with the Jm20329 which is under $0.50
>> but wait you have to add $1 for a USB hub IC and that's extra board
>> space hmmm.... then also with a lower-powered FPGA you'd be able to do
>> a parallel bus between the two FPGAs.
>>  yeah good thinking ken.
>> l.
> I forgot to ask a few things....
> The USB Hub IC


> and JM20329 chips, what is the minimum Quantity for the
> reported price,

 don't know.  i'm under NDA so i can't say more.

> and how many ports are enabled by each IC?

 fe1.1 is 4-port

> As for the FPGA, how complex would it be to rework numerous opencore
> designs? Some of the designs I am talking about are these
> projects...usb 2.0 core[1], a Serial ATA controller [2],  SPDIF
> interfaces[3][4] and AC'97 [5] interface. And finally, How fast of an
> FPGA is truly needed for each task.

 need some help there from people on the opencores.org forum.

> [2] Serial ATA Host Bus Adapter Core for Virtex 6
> http://opencores.org/project,sata_controller_core

 awesome!  good find.

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