[Arm-netbook] parallella

Ken Phillis Jr kphillisjr at gmail.com
Mon Jul 29 03:35:11 BST 2013


On Sat, Jul 27, 2013 at 5:32 PM, luke.leighton <luke.leighton at gmail.com> wrote:
> On Sat, Jul 27, 2013 at 11:15 PM, Ken Phillis Jr <kphillisjr at gmail.com> wrote:
>
>> I think the solution is probably looking into a hybrid setup where you
>> use a Zynq XC7Z010 or Zynq XC7Z020 soc as a base and then add a
>> secondary ( cheaper/lower-powered ) FPGA to handle things like Sata
>> and power.
>
>  yehhh, but it doesn't compare with the Jm20329 which is under $0.50
> but wait you have to add $1 for a USB hub IC and that's extra board
> space hmmm.... then also with a lower-powered FPGA you'd be able to do
> a parallel bus between the two FPGAs.
>
>  yeah good thinking ken.
>
> l.
>

I forgot to ask a few things....

The USB Hub IC and JM20329 chips, what is the minimum Quantity for the
reported price, and how many ports are enabled by each IC?

As for the FPGA, how complex would it be to rework numerous opencore
designs? Some of the designs I am talking about are these
projects...usb 2.0 core[1], a Serial ATA controller [2],  SPDIF
interfaces[3][4] and AC'97 [5] interface. And finally, How fast of an
FPGA is truly needed for each task.

[1] USB 2.0 Function Core
http://opencores.org/project,usb

[2] Serial ATA Host Bus Adapter Core for Virtex 6
http://opencores.org/project,sata_controller_core

[3] SPDIF Interface
http://opencores.org/project,spdif_interface
[4] Simple AES3 / SPDIF receiver
http://opencores.org/project,aes3rx

[5] Simple AC'97 controller
http://opencores.org/project,mmac97



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