[Arm-netbook] Testing: GPIO
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu Mar 1 20:50:00 GMT 2018
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Thu, Mar 1, 2018 at 8:33 PM, Richard Wilbur <richard.wilbur at gmail.com> wrote:
> On Wed, Feb 28, 2018 at 2:41 PM, Luke Kenneth Casson Leighton
> <lkcl at lkcl.net> wrote:
>> On Wed, Feb 28, 2018 at 9:09 PM, Richard Wilbur
>> <richard.wilbur at gmail.com> wrote:
>>> After realizing that you mentioned all 8 GPIO lines were on the 20-pin
>>> expansion header J5 in the microdesktop case, I consulted the
>>> microdesktop schematic for clues.
>>>
>>> I suspect the UART and EOMA I2C pins should be left to those functions.
>>
>> yehyeh. UART implicitly tested "if console works it's probably
>> good" and I2C with a bus scan, i2c-utils, if 0x51 EEPROM shows up,
>> it's good.
>>
>>> I have added tables to the "Testing"[*] page under the "GPIO" section
>>> with my nominations for which pins to test and their mapping back to
>>> A20 register bits.
>>
>> awesome. it'll have to be done manually for now,
>
> Are you suggesting that the testing "will have to be done manually"?
the mapping created manually. sorry, i was thinking in terms of
device-tree fragments... which don't exist yet.
> What is the time frame of "for now"?
when testing is required.
> I'm trying to figure out which pins of the expansion header we want to
> test, which pins of the processor those correspond to, and thus which
> registers and bits of those registers we need to manipulate. That
> determines how I need to interact with the GPIO driver.
yehyeh. and determining that interaction "has to be done manually".
if the devicetree fragment existed it would be a much simpler matter.
>>> Luke, does this match your understanding of the GPIO pins to test?
>>
>> yep - GPIO_19,20,21 missing.
>
> In the following table (created while I was trying to figure out which
> GPIO were connected in the EOMA standard) you will see that EOMA nets
> GPIO(18)/EINT3, GPIO(19), GPIO(20), and GPIO(21) are not connected on
> the microdesktop schematic v1.7 from J14. Thus they are at J14 but
> not available anywhere else in the microdesktop v1.7.
yep, forgot that. why the heck did i leave them out?? duur...
> 1342 Fri 23 Feb 2018:
> EOMA A20 DS113 microdesktop
> Net Name ball register CON15 pin J14 pin
> PWM B19 PI3 43 22 GPIO(10)
> EINT0 A6 PH0 63 32 GPIO(11)
> EINT1 B6 PH1 17 9 GPIO(16)
> EINT2 B2 PH14 44 56 PWFBOUT GPIO(17)
> EINT3 C2 PH18 39 20 NC GPIO(18)
> GPIO(19) A1 PH15 40 54 NC
> GPIO(20) C1 PH17 41 21 NC
> GPIO(21) B1 PH16 42 55 NC
>
> We could obviously create a v1.8 schematic for the microdesktop and
> connect these EOMA nets to a header, if desired.
yes. damn. i think it's probably that i didn't update the
micro-desktop schematic when i changed the EOMA68 spec from 24-pin to
18-pin RGB/TTL.
l.
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