[Arm-netbook] HDMI High-Frequency Layout: Recommendations

[Richard Wilbur]

My wife was sick last week so I spent more quality time with my
daughters taking them to appointments, working with them on their
studies, et cetera.

I'm working on the geometry of the taper for this afternoon, but first
a few questions to clarify some points.

On Sun, Oct 22, 2017 at 1:12 PM, Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
> On Sun, Oct 22, 2017 at 7:33 PM, Richard Wilbur
> <richard.wilbur at gmail.com> wrote:
>> By the way, the Analog Devices employee's recommendations can't be exactly
>> normative with my understanding of transmission line impedances--
>> differential impedance < 2 * single-ended impedance.
>> (In other words you'll want single-ended > 50Ω if you hope to get differential = 100Ω.)
>
>  that makes a kind of sense
>
>> I'd consider them design guidelines or goals in order to try and
>>  keep the process from going in the ditch.
>
>  well...  in theory it might be possible to change the layer stack
> slightly (move layer 5 a bit further away from layer 1), or go to 4mil
> track widths (but preferably *without* moving any of the traces!)
>
>  the layer stack height alteration is an easy one to do.
>
>  track width changes... yyeah... 4 mil would be the thinnest tracks on
> the entire board, i'm reluctant to do it but we can do it if
> necessary.

I think we can get away without much of the special considerations we
are spending on this and it will probably work just fine at HDMI v1.4
but moving up to higher clock speeds with the later versions will
likely require more care.  That said,
1.  do you have a picture of the HDMI layout you referred to which is
known to have worked?

I'm working under the assumption that we can leave the board
fabrication parameters alone (stack thickness, smallest trace,
smallest gap) and still make a working HDMI transmitter.

2.  Does Mentor Graphics give any documentation to explain the
provenance of the impedance numbers it reports from PADS layout?

I am somewhat surprised to hear that our impedance is higher than we
calculated with the TI equations--especially since we have several
incursions within the guidelines they suggested.  I expected to be on
the low side, not the high side, of what we designed for.  Thus my
initial reaction that the 89Ω value sounded more like the differential
impedance which had sagged a bit (from ~110Ω) under the pressure of
close copper.  I expected to design for a little higher impedance with
the knowledge that we would likely lose some to unavoidable spacing
issues.

So if the impedance number from PADS is to be useful we really need to
know what it is measuring.  If it is single-ended, we are high and
take measures to reduce it such as bringing ground fill closer to
traces.  If it is differential, then we are about 10% below nominal
and we should make sure any change to the layout doesn't further lower
the impedance.  If it is neither, we will have to come to some
understanding of what it is in order for it to be useful as design
feedback.

3.  How far do the differential pairs travel in the northeast
direction after turning up from the bottom of the board?  (Dimension
'A' in the diagram below.)

4.  How far do the TX0 traces travel after turning northeast from the
bottom of the board before they have to turn due north to avoid those
ground vias?  (Dimension 'B' in the diagram below.)
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