[Arm-netbook] HDMI High-Frequency Layout: Recommendations
mike.valk at gmail.com
mike.valk at gmail.com
Wed Aug 16 17:10:39 BST 2017
2017-08-16 15:17 GMT+02:00 mike.valk at gmail.com <mike.valk at gmail.com>:
> 2017-08-16 11:33 GMT+02:00 Luke Kenneth Casson Leighton <lkcl at lkcl.net>:
>> On Wed, Aug 16, 2017 at 10:31 AM, mike.valk at gmail.com
>> <mike.valk at gmail.com> wrote:
>>
>>> Looks pretty. Seeing that does raise a question too me. Is it
>>> necessary to match length between the different pairs? I didn't think
>>> that was a requirement. Because I see pairs wriggling and wasting a
>>> lot of space.
>>>
>>> I thought that only matching was required on a single pair. Impedance matching.
>>
>> that's what we've been discussing. read richard's message and my response.
>
> I've read it again. But did not digest that from Richard's responses.
>
> Inter-pair skew: Length (un)matching between two traces making op one
> differential pair?
>
> Intra-pair skew: Length (un)matching between differential pairs? Not mentioned.
Ah it seems it's the other way around. Silly me. I knew why I kept
away from the intra and inter prefixes. I always switch them.
> The HMDI cables I've butchered had per
> pair shielding and the other lines, clock, cec, etc, unshielded
> bundled in one extra shield.
Sorry. Clock is also one of the diff-pairs. As well as pin 17 and 19,
HEAC, Utilized for ARC (S/PDIF) and Ethernet. But not in the A20 so
less of a problem.
> Richards math should help with that along with max allowed digital
> signal skew. Don't have the time to convert the math in a spreadsheet
> calculator to confirm.
Hmm not the only ones out there with these questions.
https://e2e.ti.com/support/interface/high_speed_interface/f/138/t/267205
"intra-pair length mismatch is recommended to be less than 5mils,
inter-pair length mismatch is less of a concern but the recommendation
is to keep the traces <2" and keep the clock slightly longer than the
data traces."
Keeping the clock longer makes sense. All the data is buffered before
the clock signal arrives.
https://forum.allaboutcircuits.com/threads/hdmi-inter-intra-pair-skew-inter-pair-synchronization.75801/
5bits of buffer.
http://ieeexplore.ieee.org/document/1706346/
https://www.researchgate.net/publication/224650488_Effects_of_skew_on_EMI_for_HDMI_connectors_and_cables
paywall, blegh. Put in a request on the second one. Let's see
https://www.infocomm.org/cps/rde/xbcr/infocomm/Dietro_HDMI.pdf
That explained the "eye diagrams". Overlapping differential signals.
Hmm 1bit buffer? 1920x1080p60 = 148.5 Mhz
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