[Arm-netbook] Allwinner outsells Intel
Roman Mamedov
rm at romanrm.ru
Thu May 9 14:19:33 BST 2013
On Thu, 9 May 2013 13:03:49 +0000
joem <joem at martindale-electric.co.uk> wrote:
> Hmm...
>
> The shortest reply I can give you is that as EEs we
> make our own buses, drivers and protocols.
Yep, and the thing is, you don't make or rewire ASICs, what's inside the A10
you can't change, it doesn't support SMP and you can't magically add that.
In theory you could kludge something around it in a cluster-like architecture,
but for it to have any kind of performance at all, an additional ASIC may be
required;
...and even THEN it will be highly different from "just a multi-core
processor", it will probably look like several independent nodes with at best
shared access to a RAM area, and this will help you only in specialized
computing tasks specifically programmed for it (or via some more standard HPC
layer like OpenMPI).
Not as simple as copypasting some KiCAD around.
--
With respect,
Roman
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