[Arm-netbook] A minimal A10 SBC

[Ajith Kumar]

> ground layer next to the DDR3 tracks to get the characteristic impedance

> > correct and also to give good return path. Something like:
> > L1 : tracks , L2 : ground, L3 : power, L4 : tracks, L5 : GND, L6 : tracks
>
>  that looks about right.
>
> > Since you already have done it,
>
>  i have not.  what i have done is asked SoC manufacturers to supply

full EVB schematics.  i have then NOT ONCE MADE ONE SINGLE ALTERATION
> TO THE DDR3 LAYOUT, precisely because i know that it is beyond my
>

Hi Luke,  This is the only uncertain stuff I think, I go by the old saying
"When you don't get what you want, what you get is experience". I have no
other option.
If you find time, please check for mistakes in the DDR part of the
schematic. I have uploaded with some more changes. I have the A13 core
board from WITS, that gives some idea about the AXP209 layout.

ajith

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-- 
Dr. Ajith Kumar B.P.
Scientist SH
Inter-University Accelerator Centre
Aruna Asaf Ali Marg
New Delhi 110067
www.iuac.res.in
Ph: (off) 91 11 26893955 (Ext.230)
      (res)91 11 26897867
      (mob) 91 9868150852
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