[Arm-netbook] Small Pitch BGA Packages
lkcl luke
luke.leighton at gmail.com
Tue Jan 24 01:35:18 GMT 2012
On Mon, Jan 23, 2012 at 1:41 PM, Bari Ari <bari at onelabs.com> wrote:
> On 01/23/2012 07:31 AM, Bari Ari wrote:
>> On 01/23/2012 04:50 AM, lkcl luke wrote:
>>> http://www.ti.com/product/am3894 hm - i swear i saw something like
>>> this for $95 not $38. ok, so maybe they managed to get reasonable
>>> yields on these 1000+ pin BGA packages after all.
>>>
>>>
>> You might be under a misconception that there are yield issues with
>> getting die packaged into small pitch bga. It's really not an issue.
>>
>> Assembly to a PCB is more difficult.
... btw, something occurred to me: you notice on that wits-tech
diagram, ok it's a bit small to see, but there is *just* enough room
to get a track in between the BGA pins... of 0.8mm pitch. the pads
are about 0.3mm or so, and the track width is 0.13mm with a gap of
0.13mm either side.
that is simply flat-out impossible with a 0.4mm pitch BGA grid.
as a result, any PCB layout that has such tiny pitch is *forced* to
place vias directly underneath every pin, and to use 8 to 12 layers.
if you look at hardkernel's 43x25mm postage-stamp PCB, the one that
they put an exynos4210 on, it's POP but they _still_ had to use 12
layers, which is mad.
so i think someone has been reaally thinking hard about the design of
the allwinner a10: you don't make it possible to put DDR3 RAM within
1cm of a CPU only using 6 layer PCBs by accident :)
l.
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