[Arm-netbook] [eoma68] mini desktop pc
luke.leighton at gmail.com
Wed Dec 4 18:50:28 GMT 2013
On Wed, Dec 4, 2013 at 2:42 PM, joem <joem at martindale-electric.co.uk> wrote:
> On Wed, 2013-12-04 at 12:22 +0000, luke.leighton wrote:
>> On Wed, Dec 4, 2013 at 9:14 AM, joem <joem at martindale-electric.co.uk> wrote:
>> > On Tue, 2013-12-03 at 11:35 +0000, luke.leighton wrote:
>> >> On Tue, Dec 3, 2013 at 10:00 AM, joem <joem at martindale-electric.co.uk> wrote:
>> >> > 1. You need the internal 3.3V line brought out from EOMA68 to one of the
>> >> > pins for general circuit design reasons.
>> >> not going to happen. sorry. designs need to take that into account.
>> >> apart from anything there will be boards in the future that don't
>> >> *have* a 3.3V line (for whatever reason).
>> > Not a request.
>> > The 3.3V line is the pull up line for GPIO lines.
>> > Something to get right in next revision.
>> joe: it's still not going to happen. there are not enough pins. I/O
>> board designs will need to generate the correct 3.3v compatible TTL
>> levels by having the correct regulators on the I/O board. as 3.3v TTL
>> levels are the same everywhere this is perfectly feasible.
> Hmm... some misunderstanding going on here.
> The "pull up line for GPIO" != any old power supply
> line of same voltage.
the specification for all TTL signals is "that of the Allwinner A20".
that means 3.3v TTL for GPIO. that's the end of it.
> It depends on circuit design.
no, it depends on the specification. and the specification is "3.3v
TTL for all GPIO".
in case that is not clear, that is "high" voltage of 2.0 volts,
threshold of 1.4 V and "low" voltage of 0.8 V.
is that clear?
if it is not clear, what is not clear about the "high" threshold
voltage being 2.0 v and "low" being below 0.8V?
in case it is still not clear, at what point is a voltage of exactly
3.3v required in order to set a TTL "high" signal of over 2.0v?
> If it were a TTL board, or something like a PIC running on 5V,
> then the 5V line will have become the GPIO pull up line.
> It just so happens that for the GPIO in the EOMA,
> the pull up line for GPIO is specifically
> the 3.3V line powering the GPIO.
no, it is not. the voltages are "2.0v" for HIGH and "0.8v" for LOW".
what about this is not clear?>
>> there is therefore not only enough pins available, but also this is a
> May be use up one more of the GND pins?
perhaps it was not clear enough, joe. which bit of "this results in
design complexity and additional cost, both of which are unacceptable"
was not clear?
i apologise but i'm having real difficulty understanding why you're
not following the logical reasoning and decision-making that i'm
presenting to you.
> I plan to buy a couple when they become generally available.
> I got 50 x 5" 800x480 screens to play with at the moment :)
> The price of these boards are coming down so fast its possible to build
> desktop computing clusters. I worked out a proper 3D stackable case
> design for that and ordered 6 x cubies a few days back. Easily modified
> to fit the eoma which is better suited for cluster building because
> a large part of the CPU board is not exposed to the elements.
> So despite the slight premium compared to similar spec boards,
> the main board not being exposed to the elements
> will still make it a winner for cluster computing.
indeed. once we have some sales going we can look at quad-core SoCs
again, as well as a GbE and RAM upgrade to the EOMA68-A20.
>> so until someone takes over designs who has the required knowledge
>> and expertise, i have to stick with "safe" software packages.
> The stuff I get done takes hours to days and nearly everything I build
> works first time. So lead by example I guess!!!!!!
you have expertise that i don't have, basically! i've only been
working (full-ish-time) with board designs for about a year, working
with other experts who do have the expertise and knowledge. you've
got... what... NN years experience? that's the difference.
> When I get time, I break down Dr. Ajiths design
> into pre-routed modules so it takes next to no time to glue together to
> make into larger modules. Stuff that must be done in PADS can be
> exported as Gerbers, KiCAD can import gerbers, so you could route the
> DDR and CPU in PADs, export the gerber, pull Gerber into KiCAD and do
> the non-critical stuff there by pulling in the various modules as
> Any way its up to you. Speed up the work using well built and tried
> and tested modules that everyone has shared, tried and tested, or go the
> monolithic way. Less chance of donating help if doing monolithic designs
> and going the PADs way or any other proprietary package.
well, the preliminary schematics designs i've done are still in
http://git.rhombus-tech.net/eoma.git - anyone is welcome to improve
and continue those GPLv3+ designs.
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