[Arm-netbook] origen 4 (exynos S5PV310)

luke.leighton luke.leighton at gmail.com
Sat Sep 15 23:10:13 BST 2012

On 9/15/12, Alejandro Mery <amery at geeks.cl> wrote:
> On 15 September 2012 20:57, luke.leighton <luke.leighton at gmail.com> wrote:
>> On Sat, Sep 15, 2012 at 4:31 PM, Derek LaHousse <dlahouss at mtu.edu> wrote:
>>> On Sat, 2012-09-15 at 13:18 +0200, Henrik Nordström wrote:
>>>> fre 2012-09-14 klockan 21:58 -0500 skrev Eric Stuyvesant:
>>>> > Yeah, and 2ghz dualcore A15 as well. Wowwww is right.
>>>> Does it fit in eoma power profile?
>>>> Regards
>>>> Henrik
>>> If not, there's always underclocking, right?
>>> Hey, if USB 3.0 can provide nearly 10 W of power, how does the card stay
>>> under 5W?  Or, does the card just provide the data lines, and the power
>>> lines come from the chassis?
>>> Actually, I'm dumb.  Of course the power lines aren't coming directly
>>> from the CPU.
>> :)
>>> Well, I'll record that anyway, and mention that USB 3.0
>>> provides more power for accessories.  Yay.
>>> I'll also add that according to http://www.usb.org/developers/onthego/
>>> it looks like USB 3.0 can support OTG as well (if the chip does),
>>> allowing the card to act as the master while power is delivered in.
>>> With 5W max dissipated in the card, that'd allow a battery to charge
>>> while being used, depending on the details of the ioboard.
>>  yyep.
>>  oh i forgot to answer the question about USB3, didn't i?  well, i
>> thought about it.  it would be necessary to reduce the number of GPIOs
>> to 12 from 16.  i know, i know.  i really should do that.  i just like
>> powers-of-two.  *sigh*.
> considering there is no eoma68 card or device made yet, can you just
> change the specs real quick? :-)

 tsk tsk pay attention 007 - the A10 CPU Card's done already!  the GRB
files have been sent to the printers by wits-tech so we should have
them back in about a week.

 but... arghh, yes i think we'll be able to get away with it.  argh.
just specify the top 4 GPIOs as "reserved" for now.  i was just
concerned about reducing the amount of GPIO

 but, i think, because the plans are to use an embedded controller
(e.g. STM32F) that extends GPIO where it's more/most appropriate



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