hi all,
i’m going to try this again in a new thread and with hopefully more clarity. i mixed 4 related topics into one email last time and apparently that doesn’t work here, which is fine. i’ll try again and break this into dedicated threads for each so we can (hopefully) discuss each topic without distraction.
this email is about the layout of data on the EEPROM.
Purpose:
Each chassis needs to ship chassis-specific information such as the vendor and device ID on the identification EEPROM. There must be a defined data structure for that information such that a bootloader/OS loaded on any given CPU card can read it out.
Goals:
* Appropriate for storage on an EEPROM (low overhead) * Appropriate for access via i2c+smbus * Can be use to store heterogeneous data. Already identified are: * Device and vendor ID * Device tree * Reliable, within the first two constraints, it must involve as few hacks as possible and as many reasonable mechanisms for reliable usage * Extensible, allowing for future expansion as necessary
Proposal:
To create a specification for the “device information data segment” (DIDS) to be referenced by the EOMA68 standard in relation to the data stored on the EOMA68 identification EEPROM.
Keeping it separate from the EOMA68 standard:
* keeps the EOMA68 spec concise * allows other open hardware implementations to more easily consider adoption
Implementation:
The DIDS will consist of a single contiguous block of binary data. The IDS will be segmented into variable size pages, and the IDS will be prefaced with a header.
Header
The header will be 4 bytes in size with the following layout:
Byte Size Value ====== === ==== 0x00 2 Capabilities bytes 0x02 1 Checksum byte 0x03 1 Reserved
The capabilities bytes are a bitfield. All bits are currently reserved for future usage and may only be assigned in future revisions of the EOMA68 specification. An IDS for this version of the EOMA68 spec must contain the value 0x00
The checksum byte is the CRC-8 result of the IDS. (The CRC-8 algorithm must be referenced from the final specification to avoid any ambiguities.)
The final byte is reserved for future use.
Pages
Other than the header, the remainder of the IDS will be divided into variable length pages. Each page starts with a header with the following format:
Byte Size Value ====== === ==== 0x00 2 Page identifier (defined by EOMA68 spec) 0x02 2 Size of page data
The page identifier (PID) is used to detect the layout of the data in the page, and all PIDs up to and including 32768 are defined in the DIDS specification. Values above 32768 are reserved.
The page data then follows directly after the header. The maximum size of page data is limited by the page size value contained in 2 bytes, or 64k. A page may consist of 0 bytes of data, which may be used in cases where the PID itself is sufficiently informative on its own.
The only page layout exception allowed is for the last, or terminal, page. The 0x00 value is used to identify the terminal page, and the remaining 2 bytes are ignored and therefore may contain any values. The terminal page always has page size of zero, regardless of the value stored in the last 2 bytes.
Navigating between pages becomes an exercise in reading page headers, seeking to the end of the page (processing the contents along the way if desired) and repeating for the next page until the terminal page is encountered.
There is no page index. Variable length pages without an accompanying index means that it is not possible to seek directly to a given page; however given the relatively small size of the IDS, the small number of pages and that the headers allow skipping from page to page this is deemed acceptable.
Aaron J. SeigoOn Tuesday, November 5, 2013 10:44:55 wrote:
The page identifier (PID) is used to detect the layout of the data in the page, and all PIDs up to and including 32768 are defined in the DIDS specification. Values above 32768 are reserved.
brain fart!
s,32768,32767,g
it’s the first 32768 values.. but that includes 0x00.
updated on discussion page
On Tue, Nov 5, 2013 at 10:03 AM, Aaron J. Seigo aseigo@kde.org wrote:
Aaron J. SeigoOn Tuesday, November 5, 2013 10:44:55 wrote:
The page identifier (PID) is used to detect the layout of the data in the page, and all PIDs up to and including 32768 are defined in the DIDS specification. Values above 32768 are reserved.
brain fart!
s,32768,32767,g
it’s the first 32768 values.. but that includes 0x00.
-- Aaron J. Seigo
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Aaron J. Seigo <aseigo <at> kde.org> writes:
There is no page index. Variable length pages without an accompanying index means that it is not possible to seek directly to a given page; however given the relatively small size of the IDS, the small number of pages and that the headers allow skipping from page to page this is deemed acceptable.
Would you please educate me (and others may be interested) why to not use an index? Do we expect pages to be added frequently, requiring rewriting an index (and thus shifting all contents)? Do we expect that people will get it wrong? Is the initialization environment so constrained that it cannot even use an index?
Derek
On Tuesday, November 5, 2013 15:59:56 Derek wrote:
Aaron J. Seigo <aseigo <at> kde.org> writes:
There is no page index. Variable length pages without an accompanying index means that it is not possible to seek directly to a given page; however given the relatively small size of the IDS, the small number of pages and that the headers allow skipping from page to page this is deemed acceptable.
Would you please educate me (and others may be interested) why to not use an index? Do we expect pages to be added frequently, requiring rewriting an index (and thus shifting all contents)? Do we expect that people will get it wrong? Is the initialization environment so constrained that it cannot even use an index?
indexes mostly make sense when there is lots of data and/or random access is common. my operational assumption here is that the # of pages will remain small (100s at most; i expect most EEPROMs to have 2) and random access on the storage is inexpensive.
if a process expects to do lots of random page accesses, an index can always be generated in main memory by processing the the page headers once at runtime.
in theory all the page headers could be banged right to the front of the EEPROM after the DIDS header and serve as a lookup table without taking any more storage space on the EEPROM. that does mean that if any page changes, you have to rewrite the entire EEPROM (rather than just from the changed page on), but we can probably assume that writes are rare and so this doesn’t really matter.
i simply doubted that having all the page indexes separate from the page data would result in any meaningful real world performance gains, whereas with an index you have to read the entire index and keep the whole thing in memory to traverse to any page to have any benefit. (incrementally reading the index is the same as page headers with page data, given constant speed reads, and since this isn’t a spinning disk that’s a reasonable assumption). writing similarly becomes slightly more complex, though certainly still easy enough that nobody should get it wrong ...
it just didn’t seem worth it and so i stuck to simplicity. ime unless you can justify gains, complexity is to be avoided. it piles up quicker than one might expect. (<insert ramblings about premature optimizations here>)
that said, once there is something akin to consensus on the DIDS i’ll definitely make sure this gets tested for performance. if it makes a difference to store an index of some sort on the EEPROM rather than traverse page-to- page, we can always adjust the spec.
On Tue, Nov 5, 2013 at 4:50 PM, Aaron J. Seigo aseigo@kde.org wrote:
that said, once there is something akin to consensus on the DIDS i’ll definitely make sure this gets tested for performance. if it makes a difference to store an index of some sort on the EEPROM rather than traverse page-to- page, we can always adjust the spec.
... e.g. to simply use a FAT filesystem (FAT12 or something).
l.
On Tue, Nov 5, 2013 at 9:44 AM, Aaron J. Seigo aseigo@kde.org wrote:
hi all,
i’m going to try this again in a new thread and with hopefully more clarity. i mixed 4 related topics into one email last time and apparently that doesn’t work here,
the usual mailing list rules you'd expect are a bit... lax here :)
which is fine. i’ll try again and break this into dedicated threads for each so we can (hopefully) discuss each topic without distraction.
ack.
this email is about the layout of data on the EEPROM.
... i've cut/paste this revision into here so that it can be merged in http://elinux.org/Talk:Embedded_Open_Modular_Architecture/EOMA-68/EEPROM_Dat...
Purpose:
Each chassis needs to ship chassis-specific information such as the vendor and device ID on the identification EEPROM.
arm-netbook@lists.phcomp.co.uk