On 04/02/2017 06:17 PM, Luke Kenneth Casson Leighton wrote:
On Sun, Apr 2, 2017 at 10:51 PM, zap zapper@openmailbox.org wrote:
I am really though glad you take this sort of thing seriously. We should all thank you for such zeal towards keeping things "Libre"
mmm... zeal's a dirty word, now :)
My bad...
I hope you are successful Luke. And really, if normand sees this post, I hope he has a better understanding of the consequences of such actions.
let's hope so
Anyways though, I look forward to when you get the rockchip processor working to your specifications.
i'll be happy it works _at all_!
I am sure you will figure it out sooner or later.
One last thing though, you said the a20 doesn't support 4.9 kernel...
correction: it does... but not with 100% hardware functionality supported (which is no good for what i promised and demonstrated in the updates)
but what about the rk3288 processor?
mainline for everything. u-boot, kernel - everything. it's been that way for some considerable time.
i'm still struggling with reverse-engineering the proprietary DDR3 200mhz initialisation binary, working out what the discrepancies are between that and u-boot. it doesn't help that i don't know if i soldered the processor on incorrectly or any one of the four 96-pin DDR3 RAM ICs...
i've bought a stack of cheaper RAM ICs with which to experiment: they're the same ones as on the RK3288-Firefly so in theory i should be able to use exactly the same dtb file for the dram settings... except the damn impedance is only (appx) 50 ohms not 100 like it is for a 6-layer 1.6mm PCB...
basically there's too many unknowns in order to triangulate exactly where the problem might be when any one of them could be the source of the failure. at some point i'm just going to say "fuck it", work out how to load the proprietary DRAM initialisation, then u-boot with DRAM initialisation *disabled*, work out how to get the RK3288 *out* of DRAM initialisation mode and to continue running u-boot.
I am hopeful you will succeed in reverse enginnering the rk3288.
apparently the internal ROM USB-loader can be asked to "shift" whatever's loaded down into a different address in memory, but how it's then executed i don't know.
l.
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