[Arm-netbook] Early UART output vs. housing board discovery

Luke Kenneth Casson Leighton lkcl at lkcl.net
Fri Jan 12 10:29:14 GMT 2018

crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

On Thu, Jan 11, 2018 at 9:50 PM, Jonathan Neuschäfer
<j.neuschaefer at gmx.net> wrote:
> Hi,
> Please excuse the verbosity of some parts of this email, where I tried
> to be extra clear.

 thanks jonathon.

>>  no, it's very clearly specified that there *is* no limit or
>> restriction.  which is totally different from leaving things
>> "unspecified".
> The EOMA68 spec doesn't specify how to enable early debug mode, that's
> what I meant.

 the correct technical phrase is "it is out of scope".  which i forgot to add.

 so that's because it's assumed to be part of either a factory install
(where the EOMA68 specification does not apply.  or it does - or
should say -  "this is out of scope")

 or you are a Technical End-User.... where the EOMA68 specification
does not apply.  or.. it does, but it says - or should say - "this is
out of scope"

>> >> > In short: Thank you for the clarification. Now I disagree with this
>> >> > decision in the spec. :-/
>> >>
>> >>  ok, so bear in mind that the UART wires double up as GPIO, and that
>> >> it is the HOUSING DESIGNER's right, under the EOMA68 specification, to
>> >> make the decision to allocate eiher one (or both) of the UART wires to
>> >> GPIO - as either Input or Output.
>> >
>> > This is AFAICS not a big problem under my suggested change.
>> >
>> > For reference, this is my suggested change:
>> > - CPU Cards may use the UART lines for debug purposes while they are not
>> >   fully (enough) booted.
>>  ok so that implies that the UART lines MAY be UART... they MIGHT also
>> be GPIO.  please bear in mind: anything that involves "confusion" is
>> AUTOMATICALLY prohibited from being included in the EOMA68 Standard.
> Confusion for which group of people?

 mainly it's the end users

> USERS: Early debug output is a feature that probably shouldn't be
> documented for Retail Endusers anyway:

 absolutely.  in fact it is the opposite: they should NOT be informed
of its existence.  they would be totally scared and freaked out.

> They can't be expected to find
> it useful. Technical Endusers however can probably navigate the
> confusion, and understand the feature if it's documented well enough.

 ... exactly.

> CARD DESIGNERS: I don't think card hardware designs need to change.

 yyyeah.... i think it should be _adviseable_ - not mandatory but
_advised_ that easy and independent debugging - preferably without
dismantlement of Cards - should be mentioned.

> HOUSING DESIGNERS: Yes, this puts the burden to tolerate UART mode
> during early boot on housing designers.

 that's the bit that's not acceptable.

> OPERATING SYSTEM DEVELOPERS: Yes, OSes may need to do a little more in
> order to use the full feature set of a housing.
> BOOTLOADER DEVELOPERS: AFAICS, they need to care less about EOMA68 then
> before, because they can now just print all the debug output they want,
> without looking at the EEPROM.

 ... and lose 2 critical GPIO pins where they are extremely precious,
and if they are not available you have to add $1 to $1.50 to the
Housing BOM to add an 8/32-bit MicroController, and massively
complicate the OS and Housing design compared to just having 2 GPIO

 ... no :)

>> i  appreciate that in this case you describe a procedure that would
>> remove doubt, but the procedure itself is very burdensome to
>> implement.
>>  there is a story i told about the X25 Standard which illustrates how
>> these kinds of choices result in lost opportunities and/or total
>> confusion and thus destroy confidence in a standard.
>> > - When a CPU card has fully (enough) booted, it must use the UART pins
>> >   in the function that's described in the EEPROM.
>>  ok so the boot process you propose is:
>>  * bring up the CPU (DDR3, PLLs)
>>  * initialise EEPROM GPIO pins and configure them as I2C
>>  * read an I2C EEPROM
>>  * decode it
>>  * work out if it's SAFE to write to UART
>>  * THEN write debug / print messages on the UART pins
>>  ... can you see how that's not "early" at all?
> No, what I'm trying to propose (and think through) is different:
> * Reset the SoC and bring the pins of the EOMA68 connector into the
>   state that's mandated at reset (most pins tri-stated, etc.)
> * Bring some of the SoC (configure clock trees, maybe the DRAM, too)
> * Initialize the UART and start using it, because it is safe to use in
>   early boot

 yes.  ok.  this is where the problem starts.  this is why i described
it as "forced writing to UART".  if you FORCE writing to UART, you
MUST not have the possibility of these two pins potentially being

 why?  because you get into a CMOS current fight between UART and
fixed GPIO function (short to GND or short to VREFTTL) which will
either damage the UNBUFFERED processor pins or damage the housing.

 therefore you must make it MANDATORY that the ONLY function that
those two pins have is: UART.

 therefore you LOSE two precious GPIO pins.

 and that is not acceptable.

> * Continue bringing up things and printing debug messages
> * Perhaps already load the OS kernel
> * Configure the I2C controller and read the EEPROM
> * Stop doing early debug output, and start using the UART pins in
>   the way that's mandated by the EEPROM

too complicated.

> I can see two points where problems might occur:
> * If software fails to disable early debug output in the UART (this
>   shouldn't too hard to solve in Linux, though).

 there is also damage to the SoC or to the housing to take into consideration.

> * If the CPU card spontaneously resets without first bringing the
>   housing into a state where it tolerates early debug output
>   (some housings might require such preparation before shutdown).

 exactly.  and that is far too complicated.  right now there is *zero*
need - at all - for *any* kind of complexity on the Housings.  the
Micro-Desktop is.... it's just a bunch of connectors.  as in, that's
*all* that's needed.

 oh!  ah.... that's another reason why the proposed change can't be
done (aside from it being unnecessary, as there are debug mechanisms
available): the MicroDesktop PCB is finalised.

>> > For example, UART
>> >   connected to a Bluetooth module, GPIO connected to whatever, etc.
>> > - If a housing needs to protect its components from debug traffic, it
>> >   must provide (and describe in the EEPROM) a mechanism for the CPU card
>> >   to signal that it has booted far enough to use the UART pins for the
>> >   function intended by the housing. This can be done through a I2C
>> >   register poke, toggling a (different) GPIO line, etc.[2]
>>  this is _way_ too complicated, and also not clear.
> Sorry, what exactly is unclear?

 it's too complcated, it raises the complexity of Housings from
"passive I/O systems" to "requiring some form of boolean logic
circuit".  it's not needed, it's too complicated, and it's also,
realistically, too late.

>> > - I think it should be valid for a CPU card to follow the current model
>> >   and keep the UART pins tri-stated until it's fully booted. A housing
>> >   that wants to capture early debug traffic can generate a well-defined
>> >   idle signal on the TX line with a pull-up.
>>  this is even more complicated... and also unnecessary when the person
>> doing the debugging may either:
>>  * in-situ use multiplexing of user-facing connectors (A20 MicroSD /
>> UART-JTAG capability)
> Yes, because this is a completely different approach.
>>  * take the Card out of the Housing and test it in a home-made or
>> laboratory-owned test Housing.
> How can a lab housing tell a card that it's safe to do early debug
> output?

 that's the responsibility of the Technical End-User to research and
determine precisely that.

> (Or is that still signaled out of band, e.g. by replacing the
> boot loader?)

 you replace the bootloader.  it is *REQUIRED* - as part of the EOMA68
Specification - that the replacement of the bootloader - all of it -
be not only possible but the hardware be FULLY DOCUMENTED such that it
IS possible.

 that allows for companies to provide proprietary bootloaders if they
so wish (for which they will be charged extra fixed-rate
non-percentage-based non-royalty-based license costs).

 if however they release FULL source code of the bootloader (and the
full toolchain), they will not be charged any fees at all.

>> > Thus it is just as (non-)optional as USB, with the difference that the
>> > CPU card decides whether it prints early debug messages, and the Housing
>> > decides whether it connects the USB pins to any USB devices or
>> > connectors.
>>  the purpose of requiring the "non-optionality" is to ensure that
>> there is absolutely no way that a future Card or future Housing will
>> be incompatible with an older Card or an older Housing, no matter how
>> much faster the peripherals on either the Card(s) or the Housing(s)
>> have become.
> [...]
> How is speed relevant to this discussion?

 it is an illustration of the fact that this is a long-term standard.

>> > "Fully (enough) booted" in the above doesn't just mean the CPU has left
>> > the bootloader. It also has to have read the I2C EEPROM, which might
>> > require quite a bit of work in the kernel (initializing the I2C
>> > controller, at least). Things can go wrong before the CPU card has
>> > booted far enough before it can read and interpret the I2C EEPROM, which
>> > is my whole motivation.
>>  exactly.  and that's precisely why additional complexity should *not*
>> be added to the negotiation phase.
> I don't quite understand your argument here: The only way I'm
> complicating the "negotiation phase" is by requiring that the software
> stops any Debug UART output before it switches its use of the UART pins
> over to the housing-mandated use.

 that is far too complicated compared to the "passive" nature of, for
example, the Micro-Desktop Housing.  see above, the answer is the same
as here.

> I am not complicating negotiation itself (init I2C controller, read
> EEPROM, parse EEPROM, act on it).

 the current design, there *is* no extra negotiation, period, on the
Housings.  therefore adding some *is*, by definition, a whole new
level of complexity [that is not acceptable.  and too late.  and

>> >>  .... so what do you think would happen, in this case, if someone
>> >> plugged in a Card where it was FORCIBLY REQUIRED that UART *ABSOLUTELY
>> >> MUST* transmit "early boot messages" on those two wires?
>> >
>> > Required by which part?
>> sorry, the use of the word "part" is not clear.  part of the standard?
>> part of the Card? part of the Housing? part of the proposed
>> modification to the standard?
> I mean hardware part, which would be either the CPU card or the Housing.

 precisely.  you do not know.  therefore there is the risk of
confusion.  and therefore,  one - or other or both - would be damaged.

 it is ABSOLUTELY ESSENTIAL that there be ZERO possibility for
ambiguity in a standard.

>> > - Housings shouldn't require to see any debug messages from CPU cards,
>> >   that's just silly
>>  the point is: if the wires are to be forced to transmit early debug
>> messages, then in ABSOLUTELY NO WAY can they also be allowed to change
>> over to GPIO.  there must be ABSOLUTELY NO POSSIBLE RISK that their
>> use as UART could conceivably cause damage to either the CPU or to the
>> Housing components.
> Ok, I think I see the point here.

 yehyeh.  it's really, really important.

>>  and if there is a current fight between a GPIO that is tied
>> permanently to VREFTTL on the Housing and the forced requirement to
>> transmit UART early debug messages tries to pull it high, we have a
>> serious problem.
> Permanently (through PCB traces) tying pin 23 (GPIO8/UART_TX) to VREFTTL
> is not allowed under my proposal.

 that would need to be part of the specification.  now you have to
have a resistor in the circuit to stop damage.  NOW you have to wonder
if that will stop the GPIO pin, if it is an input, from being able to
drive the line properly.

 ... do you see how it gets massively complex?

and i haven't even gotten into how to protect the GPIO from
over-voltage protection during power-down and power-up.

 it's just far, far too much, jonathon... *and completely unnecessary*.

> (And I think you meant "tries to pull it *low*", not high.)

 it doesn't matter which it is: damage can occur either way.

>>  i appreciate that you have come up with a solution to this, involving
>> a complex process of ascertaining via the EEPROM whether the pins are
>> GPIO or UART,
> Figuring out (in software) whether the pins are used as UART or GPIO at
> runtime, by asking the EEPROM, is no more complex than before.

 it's too complex, and you can't debug the chip during the EEPROM
bring-up phase because it's too dangerous to do so.

 it's *too complex* jonathon.

>> but it is complexity where *none* exists at the moment,
>> and there are two easy alternatives that place absolutely no burden
>> whatsoever on the Technical EndUser.
> Soldering to small test pads inside the card is a burden.

 yes.  it's not recommended.

> Figuring out the pin muxing and ordering a microSD breakout board is
> also a burden.

 tough.  a Technical End-User *will* be expected to figure it out.
that's why they're called "Technical End-User".

> Those might be small burdens (depending on the experience and market
> situation of the Technical Enduser), but they are still burdens.

 yep.  tough.  if they can't figure it out, they can ask someone
online how it's done.  this is no different from any other dev-board.
someone, somewhere, knows how to do it.

> Okay, I think I now understand the main problem with my proposal:
> Ensuring that it is safe for the CPU card to use pins 23 and 57 during
> early boot is hard or causes some additional complexity in the housing
> and software, because (a) because it may reset (and thus enter early
> boot) spontaneously, and (b) when it leaves early boot, it may have to
> tell the housing about it.

 exactly.  and the very fact that the housing has to have "logic" in
it, where the Housings are currently TOTALLY passive, is a level of
complexity that's unacceptable [and unnecessary].

> My goal was to have a mechanism, specified by the EOMA68 standard, by
> which an interested Technical Enduser can access early debug output of
> any EOMA68 CPU card, without doing anything CPU card specific (such as
> ordering a Allwinner A20 µSD breakout board, or opening the card and
> soldering some wires to the right testpads, or loading a "debug enabled"
> version of the particular bootloader/OS running on a card).

 my goal is: to make it easy and safe for normal mass-volume end-users
to use EOMA68 systems.  "Just Plug It In, It Will Work".  everyone
else - everything else - comes secondary.

> Here's a *completely different* and significantly simpler proposal,
> which also fulfills these goals. You probably won't like it because
> (a) it takes away a pin from general purpose use, (b) it breaks
> compatibility [see footnote 1] with current hardware.
>   Replace one of the GPIO pins (such as pin 21, GPIO 20) with a single-
>   purpose Debug UART TX pin, where the CPU card may print debug messages
>   in 8N1 format. Debug UART TX high/low is measured against VREFTTL.

 nope.  not enough pins.  you're thinking in terms of prioritising
"Technical End-User" over "End-User".

 the volume of sales to "End User" is intended to be HUNDREDS OF MILLIONS.

 the volume of sales to "Technical End User" is expected to measure in
the thousands.

 ... which should the project be prioritised for?

 if this was something like a "Mars Board" or a "Beagle Board" or
{insert-other-technical-developer-board} it would be a totally
different discussion.

 this is a *mass-volume* standard, ***NOT*** repeat ***NOT*** a

> Alternatively, this could be two pins (Debug UART TX and RX) so that
> something like a bootloader shell may be used. But this is probably
> worse because it takes another pin away from general-purpose use.

 exactly.  now you're getting it.  the cost of adding break-out GPIO
extenders could add 10 to 20% onto the BOM, and that's totally
unacceptable in a *mass-volume* market.  it's perfectly acceptable in
a "Demo Board" or a "Reference Design Board" or a "Developer Board"
scenario, but completely unacceptable for a mass-volume standard.


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