[Arm-netbook] HDMI High-Frequency Layout: Recommendations

[Richard Wilbur]

On Sat, Sep 16, 2017 at 8:23 AM, Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
> http://rhombus-tech.net/allwinner_a10/news/
>
> ok so after the successful DC3 test this is the last final check
> before sending the gerbers off to the factory for pre-production
> prototyping.

3*Cheer!

> in the end i used a "keepout" area on both layers 1 and
> 3, drawn by hand, to ensure that no GND flooding gets near the HDMI
> traces on layers 1 and 6.

"keepout" on layers 1 and 6, right?  Not a bad idea, especially since
it allows the situations at both ends of the traces to avoid design
rule check (DRC) failures because we have copper that has to be closer
than 15mil there.

> l'm including layer 3 as an example of how
> the group of HDMI vias that come just out of the A20 punch a large
> hole: GND-flooded layers 2 and 5 as well as 4 (power plane) will also
> look like that.

Could you put a similar snapshot of layers 2, 4, 5 on hands.com (or
wherever you think appropriate)?  I'm interested to see what
holes/voids and connections the power and ground planes have.

What are the names of the power pins on the A20?  What voltages do you
supply it?  (Are any of them Vdiff+/-, e.g?)  I'm interested in
tracking down the power supply pins for the differential HDMI signals
as that is where our return path for common-mode signal has to go.

I've read a little (not nearly as much as I'd like, but I lack time)
about using a taper to match impedance differences while minimizing
the reflection coefficient.[*]  I'm thinking we can use it at both
ends of this layout to great advantage.  We taper from 5mil clearance
around the A20 on layer 1 to 15mil clearance on layer 6.  Later we
taper from 15mil clearance to whatever the closest copper is at the
ESD and connector lands.

Is the closest copper on layer 1, around the A20, 5mil from the HDMI
differential signals?

What is the distance to the closest copper to the HDMI signals at the ESD lands?

What is the distance to the closest copper to the HDMI signals at the
connector lands?

(I'm guessing in both cases it is likely the neighbouring lands.  Is
that correct?)

What is the minimum frequency we will be running the HDMI at?  (With
version 1.4 the highest clock is 340MHz which implies 3.4GHz data rate
on each data line.  Thus I would expect good edges if we design for
harmonics of 34GHz.;>)

What is the vertical distance from layer to layer in our board stack?

The idea is we can taper the keepouts on our signal vias near the A20
by the layer and avoid such an abrupt change from layer 1 to layer 6.

Likewise, we can change the geometry of the keepout as we approach the
ESD lands and finally the connector to likewise ease the transition.

> richard if you want to zoom in on those pictures you should be able to
> click on them in a browser, then expand them: they're actually around
> 2,500 pixels wide, i just asked them to be displayed in that HTML page
> as only 1024 otherwise they wouldn't fit :)

Thank you.  I am enjoying the views you posted.

> you can see i removed the GND traces in between, and generally kept
> everything except VIAs away from them.  it's not perfect but thanks to
> your help i'm pretty happy with it.  if there's nothing major i want
> to send this off.

There is one place in layer 6 where the space between the CLK pair and
the adjacent data pair looks like it exceeds 35mil for a non-trivial
distance.  I think we could safely reintroduce a ground trace
connecting the 2 or 3 vias in that space and thus keep the environment
close to 15mil from differential trace to either ground or
neighbouring signal.

I'm not sure which of the gray dots are vias and which are not.  Some
of the vias might be able to sneak back into the ground-fill (out of
the 15mil differential line clearance).

Reference:

[*]  https://electronics.stackexchange.com/questions/84098/a-transmission-line-with-continuously-varying-impedance-how-would-reflection-oc
https://www.microwaves101.com/encyclopedias/klopfenstein-taper
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