[Arm-netbook] EOMA50

[zap]

On 05/20/2017 06:35 PM, Luke Kenneth Casson Leighton wrote:
> On Sat, May 20, 2017 at 10:18 PM, Christopher Havel
> <laserhawk64 at gmail.com> wrote:
>
>> My vote is for them to be SPI lines.
>> That means more/faster RAM, right?
>  RAM... where did you get that idea from... *thinks*... DDR (double
> data rate), you might have confused that with the JEDEC RAM standards
> named "DDR1,2,3,4"
>
>  so no it does not mean more/faster RAM.
>
>  SPI's 4-data-lines mode (which happens also to have optional
> double-data-rate as part of the extension to SPI *on* those 4 data
> lines) is an unusual rarely-used mode of SPI which isn't very often
> supported on SoCs.
>
>  so if there was an EOMA50 housing which requested it, almost
> certainly the SoCs would have to ignore it anyway, and do 2-wire
> (non-DDR, serial) SPI anyway... or look at doing 4-bit bit-banging at
> 50-100mhz.  which would be quite CPU-intensive.
what is eoma50 out of curiosity?
>  i sort-of added it to EOMA68 for the hell of it, because the wires
> were there.  but for EOMA50 there's less pins so...
>
> l.
>
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