[Arm-netbook] GR8 based EOMA68 card

Sat May 13 17:11:47 BST 2017

---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

On Thu, May 11, 2017 at 1:05 AM, Ismo Väänänen <ismo.vaananen at gmail.com> wrote:
> Hello,
>
> The recent talk about de-blobbing R8 and thus also GR8 inspired me to do a
> quick write up on how I see a Next Thing Co. GR8 System-In-Package chip
> being used in an EOMA68 compatible card.
> The latest version of the write up can be found here:
> https://sites.google.com/site/oh2ftg/eoma68/eoma68-gr8

 yay fantastic!

> I named the project "EOMA68-GR8" because why not.
>
> Like Vincent I'm doing this on the side and also with Altium.

 yeah i started with the same CAD designs but when i looked a couple
of weeks ago there simply wasn't the actual GR8 module itself
released.  have they added it since?   ah ha!  yes they have, yay!
 https://github.com/NextThingCo/CHIP_Pro-Hardware/

 also, i reached out to them via their website to ask for samples but
have not received a response - that was over a month ago.  did you
have any luck?

> I haven't done anything this complex in Altium before it's likely going to
> be an interesting challenge.

 well the nice thing about the GR8 is that the major complexity - DDR3
RAM interfacing - is completely gone.  the rest of the design, by
comparison, should be absolutely trivial

> GR8 has TTL/RGB LCD interface, USB2.0, I2C, SPI(SDMMC) and so on.
> All the interfaces to make a compute card compatible with EOMA68 are there.
> Except if I want the card to have "front facing" USB I'll need to include
> some USB HUB chip like TI TUSB2046, which conveniently has no firmware being
> a state machine.

 yyyyehhh... actuallyyyyy... the board is going to be so damn empty
you should easily be able to get away with that.

 now, here's the really *really* important things that you need to know:

 * PCB height will need to be 1.2mm.  do NOT use 1.6 (too high) or 0.8
(too costly)
 * components on TOP have to be an ABSOLUTE maximum of 1.9mm
 * components on BOTTOM have to be an ABSOLUTE maximum of 1.6mm.

 do NOT exceed those height clearances otherwise you simply won't be
able to get the damn case on!  typical problems with suppliers are to
give you diodes that are 2.5mm high and 4.7uH inductors that are well
over 3mm.

> I'll have to look at how the interrupts go, at AXP209 PMIC and it's routing.

 don't touch it.  at all.  don't alter *anything* to do with the PMIC:
you really don't need to.  the CHIP-Pro's PCB size is so tiny it will
literally sit surrounded in an EOMA68 form-factor with a good 15mm
clearance all the way round.  that is *more* than enough space to add
the components you want, *without* making *any* modifications
whatsoever to the majority of the CHIP-Pro's layout.

  that way, you have absolutely no "need" to "look" at how the
interrupts go: you can just use the standard kernels that they're
using, compiled as-is.

 likewise i do not recommend that you modify the SD card "detect"
lines, or any GPIO lines for specific functions that you're keeping
between the two designs.  if they use a particular pair of lines for
UART, use exactly those same lines.

 minimise the amount of effort on the hardware and it will minimise
the amount of software porting you need, ok?

 also by minimising the amount of modifications made you increase the
chances of having a 100% working board on the very first go.  it's
going to cost you about $USD 1500 for QTY 10 samples anyway, so the
less changes you do the less money you risk chucking down the drain,
ok?

> And decide on if I'll layout the NAND as the talk about blobs being required
> for NAND support sounds worrying.

 please get this straight: there *are* no blobs required for NAND
support, ok?  *full* GPL-compliant source *has* been available for the
A13 for a number of years now.  it's just that everyone lost interest
in it because allwinner stopped selling the A13.

 however what you should consider is: that those TSSOP-48 "legacy"
NAND ICs are such a pain in the ass that you should consider replacing
it with an eMMC, anyway.

 look up all the suppliers of TSSOP-48 NAND: you will find they all
say "not recommended for new designs", with the exception of the very
low capacity ones from e.g. Micron, because they're used a lot in
low-cost wireless routers.

> That and seeing in general if even a half
> reasonable layout is possible on 4-layer FR4 to get cheaper rates on the
> pcb's.

 honestly it's so simple you'll have no problems whatsoever.  really.
you should see some of the boards with 4x DDR3x16 i had to do, *those*
are hair-raising to fit into the available space.

 no, you should be able to actually just take the CHIP-Pro, not make
*ANY* modifications WHATSOEVER, drop the outline of the EOMA68 board
around it and then "connect the dots", literally.

 which you should give serious consideration to doing it that way.

 ah.  i just looked at their PCB stack: it's 6 layer.  i do NOT
recommend that you change that.

> At least there's no DDR RAM to route,

 exactly.  that makes it dead-easy.

> but the TTL/RGB fanout and
> length matching is gona be chore.

 actually it's not a problem at all.  the maximum speed is around the
100mhz mark, which at the speed of light is what... 3 metres to get
out-of-sync?  it's not like USB2 or anything, where you should be
doing like below 1mil difference on the tracks (and even then USB is
highly tolerant of discrepancies).

 one thing you do want to do though is to rotate the GR8 so that
everything comes out cleanly from the RGB/TTL side.  looking at the
datasheet they're all PD2-PD27 which is the top left corner, so if you
position the GR8 so that those all come out close to the EOMA68
connector you'll do fine.

> One more good reason to learn how the automated length matching in Altium
> works.

 honestly don't worry about it.  just keep them generally together,
and if you do have to swap the order (cross them) then use one layer
to do a right-angle "jump" then come back to the same layer... it's
real simple and can be done by hand.  it's only 25 or so wires, it
really really won't take you long.

 what i tend to do is start at one end from the CPU then stop half
way, then go to the connector and route those roughly to the same
location, keep them grouped neatly together, then do the "middle
layer" routing to join them up.

> Sourcing connectors and housings in small quantities. All that fun stuff.

 i can put you in touch with mike at the factory, he can sort all that
out for you.  i recommend you use his factory for prototyping and
production, just so it's less hassle ok?

 but please when i introduce you to him, bear in mind that he's not a
PCB design expert, he runs a busy factory.  you say "hello i need QTY
10 of part XYZ here is the datasheet, can you help" or "hello i need
QTY 10 of these PCBs made and PCBA (assembly) done, FR4, 6-layer,
1.2mm stack, here's the BOM and gerbers, please send me a quote, thank
you very much".  keep it *real* short, in other words.

> If anything I have missed comes to mind please mention it, I'd rather hear
> it now then when I have prototype pcb's at hand or layout nearly done.

 :)

 free advice: for f***'s sake take that f*****g proprietary WIFI
module off the f*****g board.  you don't need it, it will stop you
getting RYF Certification, you'll need to seek FCC Certification at a
much higher cost because of R.F. concerns, and, and, and.  so,
everything on page 6 of the CHIP_Pro Schematic: gone.  yay.

 what else.... ok, the VREFTTL is basically the 3.3v power coming out
from the AXP209 (ok not the AXP209, i checked the schematic, page 4,
it's actually U3)..  don't try to do on-card level-shifting, for
goodness sake.  the whole point of the VREFTTL concept is to avoid
doing that.

 so you mentioned something about "i haven't decided whether to do
3.3v or 5v", you do 5V power in, and the 3.3v which is going to VCC-IO
(D6, H5, M4) on the GR8 (page 19 of the datasheet, page 3 of the
schematic), that's what you *also* route to VREFTTL, ok?  looking at
the schematic for v1_0 that's generated by U3, page 4, VCC-3V3.

simple.

drop all the audio codec stuff but don't drop the AVCC or AGND.  keep
those and keep HPVCC.  it's something to do with stabilising the
analog parts of the SoC so they don't affect operation of the digital
parts.

route the AXP209's "power / reset" line through to EOMA68_RESET.  so
POWER-ON (connected to AXP209 PWRON - keep R15 the 1k resistor ok>).

 make sure you keep a couple of test-pads on the PCB, one for UBOOT
(K3) and one for GND, then put "UBOOT" on the silkscreen next to it.
they call it FEL, and they already have TP0 for this purpose, so keep
that.  lose SW2 though.

 ugh the CHIP_Pro v1_0 schematic is for a battery-driven arrangement.
uggh.  *sigh* ok you'll need to change that: take a look at the
cubieboard schematics, A10-cubieboard-2012-08-08 will do.  basically:

 * CUT BAT1
 * CUT BAT2
 * CUT BATSENSE
 * CUT CHSENSE
 * CUT LX1
 * REMOVE L1, R7, C4, C6, C7, C27 and ESD1.

there's something else you need to do... i'm making that cubieboard
schematic and also DS113-V2.7-2017-02-17.pdf available here:
http://hands.com/~lkcl/eoma

ah yes: i remember - you need to merge ACIN1, ACIN2 and VBUS.  that's
to do with EOMA68 being actually an "OTG-like" power provision.  on
DS113-V2.7-2017-02-17.pdf i know it's called ACIN-5V, it's not, it's
actually DCIN-5V, but ignore that: note then on page 11 ACIN-5V is
*DIRECTLY* connected to the OTG connector's VBUS (J11).

this is IMPORTANT if you want to do an OTG connector ok?

consider if you want to do that, yes it has advantages, such as being
able to independently power (and use) the Card from an OTG-Host
cable... but there's no HDMI output so unlike the EOMA68-A20 you lose
the real main advantage of having the OTG power!  no video output, so
errr... :)

 you would therefore be a *lot* better off just forgetting about the
USB-OTG connector, forgetting about the TI USB Hub, and just
connecting USB-OTG to EOMA68 USB port 1 and the 2nd USB port to EOMA68
USB port 2.

if you do that you will still need to wire ACIN1, ACIN2 and VBUS all
to the same net: this *is* actually explained in the AXP209 datasheet,
surprisingly.

continuing a review of the CHIP_Pro schematic... what the f*** is U6??
 a QFN20 NANC IC?  google searches on digikey, mouser and so on so
*no* such thing.  scary.  cut it!!  waaark... :)

the toshiba 1GB NAND...
https://www.digikey.com/product-detail/en/toshiba-semiconductor-and-storage/TC58NVG2S0HTA00/TC58NVG2S0HTA00-ND/5226324

 yyyeah, ok: that's a 4Gbit (512Mbyte) NAND IC... small enough and
cheap enough to be used in low-cost designs such as routers, so is
still being manufactured: i'm not seeing a "not recommended for new
designs" notice on digikey... but YOWSER $3!!!

 that's frickin ridiculous!  a 4GBYTE eMMC is $5 on digikey!

no, i would strongly suggest you either just cut NAND / eMMC entirely,
then, like i've just done on the EOMA68-A20 Card, route SDC2
(PC6-PC11) through to a MicroSD Card slot on the front, and put SDC0
through to EOMA68.

what that will give you is "default" booting off of the Card's MicroSD
slot which can be over-ridden if people want to by putting in an OS
boot card into the EOMA68 Housing SD card slot (if it's actually
available).

also it'll be about $3 to $4 cheaper on the BOM, which is quite
significant, and the whole "NAND" issue just... goes away.  but it's
up to you.

quite a lot to think about!  but actually it's really quite straightforward.

l.