[Arm-netbook] libre 64-bit risc-v SoC

[Luke Kenneth Casson Leighton]

On Mon, May 8, 2017 at 4:00 AM, David Niklas <doark at mail.com> wrote:
> I apologize for DOS'ing the list, I can only get online about once a week.

 not a problem david

> Links?

 http://rhombus-tech.net/riscv/libre_riscv/

>> > important to avoid, because mixed analog and digital is incredibly
>> > hard to get right.  also note that things like HDMI, SATA, and even
>> > ethernet are quite deliberately NOT on the list.  Ethernet RMII (which
>> > is digital) could be implemented in software using a minion core.  the
>> > advantage of using the opencores VGA (actually LCD) controller is: i
>> > already have the full source for a *complete* linux driver.
>
> Considering that analog was around *long* before digital I'm surprised
> that it is "Hard to get right",

 analog isn't "hard".  digital isn't "hard".  specifically *MIXING*
them is ultra-hard.

> is there a reason for this?

 completely different processes and design criteria.  the restrictions
(design rules) placed on digital ASIC layouts have to be adhered to in
the *analog* areas: you can't just change the stack to suit the analog
areas.  i don't know the full details, but i know someone with 30
years experience of working with ASICs who does.

> Isn't there a chip for just this kind of thing?

 no.  not a custom one... and we're taking custom ASICs.

>> > I2C, SPI, SD/MMC, UART, EINT and GPIO - all of these can be
>> > software-programmed as bit-banging in the minion cores.
>> >
>> > these interfaces, amazingly, are enough to do an SoC that, if put into
>> > 40nm, would easily compete with some of TI's offerings, as well as the
>> > Allwinner R8 (aka A13).
>> >
>> > i've also managed to get alliance and coriolis2 compiled on
>> > debian/testing (took a while) so it *might* not be necessary even to
> Hmm, I can't seem to google that piece of SW. Do you have a link?

 https://soc-extras.lip6.fr/en/coriolis/coriolis2-users-guide/
 https://soc-extras.lip6.fr/en/alliance-abstract-en/

>> > pay for the ASIC design tooling (the cost of which is insane).
>> > coriolis2 includes a reasonable auto-router.  i still have yet to go
>> > through the tutorials to see how it works.  for design rules: 90nm
>> > design rules (stacks etc.) are actually publicly available, which
>> > would potentially mean that a clock rate of at least 300mhz would be
>> > achievable: interestingly 800mhz DDR3 RAM from 2012 used 90nm
>> > geometry.  65 down to 40nm would be much more preferable but may be
>> > hard to get.
>
> How would you get it in the first place?
> Is there a company dedicated to larger than industry standard (nm)
> silicon production for small businesses, or are you planning to buy a ...
> what would it be called? ... printed wafer producer?

 not confirmed that yet.  there are some standards that can be adhered
to which apparently make the choice of foundry irrelevant.  still lots
to do here.


> What about Vulkan?

 that sounds like software.  underlying hardware would be the same.

l.