[Arm-netbook] bunnie about riscv

[Luke Kenneth Casson Leighton]

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crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68


On Mon, Jun 12, 2017 at 9:53 AM, Bill Kontos <vkontogpls at gmail.com> wrote:

> I got a question: Assuming we got a decent design for a core( maybe based
> on this https://github.com/ucb-bar/riscv-boom) , how would we deal with the
> rest of the ip blocks needed to run peripherals ? I assume the most
> complicated ones would be usb and ethernet, and I fail to see the point of
> a SoC without usb.

https://opencores.org/project,usb
https://opencores.org/project,usbhostslave
https://opencores.org/project,openarty for the UART (special, has
debug capability)
https://opencores.org/project,vga_lcd
https://opencores.org/project,ddr3_sdram

i have the source for a linux kernel driver which uses that VGA/LCD
hard macro: it was used by ICubeCorp for the IC3128.  they ran it at
too slow a speed so it would only do 1366x768 @ 30fps 8bpp: this is
probably because the bus speed for the framebuffer access was too
heavy for the Wishbone bus.  ramping up the clockrate and/or using a
larger bus width should fix that, but it will need checking.

also i believe the Gaisler Research LEON3 (SPARCv8) has an SMP implementation.

all of these are GPL licensed.... hilariously many people licensed
their hard macros under the GPLv2 in the belief that nobody in their
right mind would utilise GPLv2 hard macros for a commercial venture.

mwaahahahah