[Arm-netbook] Arm Netbook, Saw the update,

[Richard Wilbur]

On Jun 29, 2017, at 20:45, Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote:
> On Fri, Jun 30, 2017 at 3:32 AM, Richard Wilbur
> <richard.wilbur at gmail.com> wrote:
>> Have you identified which signals are affected?
> 
> no - i do not have access to equipment which will allow me to make
> such a determination.

I'll check to see whether I can get some lab time up at the university (where I took the lion's share of my electrical engineering coursework).

>> Have you been able to determine which signals are leaking into the affected signals?
> 
> ditto... basically this is all guess-work and experimentation.

Well congratulations on many good guesses and what sounds like a relatively successful experiment!

The fact that I don't know the layer stack for the board throws in some more uncertainty.  I don't know whether those differential pairs were spending a lot of time over a ground plane.  When the differential pairs crossed paths did they do so over separate ground planes, et cetera?

> ok, so what i'm planning to do, richard, is a redesign of this entire
> area, starting by widening the PCB by 1mm.

Does that still meet your design goal for EOMA68 form factor?  I wouldn't sacrifice an important design goal, yet.  I wouldn't be surprised if we can pack a working layout into your original outline.  On the other hand, more space can make the layout easier.

>  this should allow me to put several diff-pairs on the same layer
> (i'll start by trying to put them all on layer 3, see how that goes).

You said the board has 6 layers.  Does that mean layer 3 is in the midst of the stack or on the outside?  If it's inside, you could use striplines for the differential pairs[1].  It'll require three layers (two of them ground) but it is about as close to a TEM waveguide as you can get in a PCB.

> 
> would you be happy to advise before it goes to pre-production?

I would be overjoyed to put this somewhat arcane knowledge to some good use.  In other words, "Yes!"

Reading an application note on HDMI from Texas Instruments[2] I noticed they mentioned a clock rate of 340 MHz and with a data rate of 3.4 Gb/s.  In the interest of characterizing the problem at hand I would like to find a reference that describes the signals of this standard (HDMI v1.4).

Sorry for the noise.  My last two posts were prematurely sent when I was trying to type (on my phone keyboard) and accidentally hit a/an conveniently/inconveniently placed "Send" button.  I am trying to make peace with this user interface.

My wife gave me a tip:  remove the "To:" address until you are ready to send the message as without a destination address the "Send" button is disabled.

-- 
Richard

References:
[1]  _HDMI Design Guide_, http://e2e.ti.com/cfs-file/__key/telligent-evolution-components-attachments/00-138-01-00-00-10-65-80/Texas-Instruments-HDMI-Design-Guide.pdf
[2]  SLLA324 February 2012 Application Report, "TPD12S016 PCB Layout Guidelines for HDMI ESD"