[Arm-netbook] The future of EOMA-68

[Paul Boddie]

On Saturday 2. May 2015 22.05.00 Luke Kenneth Casson Leighton wrote:
> On Sat, May 2, 2015 at 8:32 PM, Paul Boddie <paul at boddie.org.uk> wrote:
> > Moreover, the RISC-V architecture on which lowRISC is based has David
> > Patterson on board, who was the originator of Berkeley RISC which was
> > developed further into SPARC, so we're not talking about a group of
> > pundits waiting for other people to do the work. Indeed, there's a
> > RISC-V core that has supposedly been "proven" on/for various
> > manufacturing processes, so those people aren't messing around.
> 
>  (1) the goal is clearly stated as "to produce a working core that may
> be used by anybody".

Indeed. I believe that even the OR1200 core - "even" because people don't 
always have nice things to say about the OpenRISC design - was used by Samsung 
in various products, so there would certainly be some interest (and thus 
money) from various companies.

>  (2) in order to restrict the amount of work that is to be done, they
> are *not* going to add any kind of "accelerated" instructions.  no
> SIMD, no special decoder instructions, no video acceleration
> instructions, no 3D acceleration instructions - nothing.
> 
> in other words they're going to spend $USD 5m to produce a chip that
> contains *NO* VPU, *NO* GPU, no hardware acceleration of any kind.

I haven't looked at anybody's plans for RISC-V or lowRISC in any detail. I 
only remarked about the people involved because they do have a pedigree here: 
it's not just people who want to do something; some of these people have been 
there, done that, and appear to want to do it again.

Whether they'll produce something that would make sense for netbooks, 
notebooks, tablets or other such things is another matter. I can envisage the 
likes of Google wanting to put this kind of thing in servers, and that 
probably isn't going to be particularly relevant to us here.

[...]

>  honestly, then, unless someone has beat some sense into them, the
> RISC-V project is pretty much guaranteed to be yet another "Open
> Flop", where money is poured into yet another expensive lesson.

I can see it being useful for certain companies for sure: they get to 
collaborate on a core architecture which doesn't have a gatekeeper, and they 
also get to add their favourite features. Some of those companies will happily 
add GPU, VPU or whatever because that's what they've been doing all along with 
whatever other architectures they've been using. (An example of an 
unencumbered architecture getting enhanced is, of course, MIPS by the likes of 
Ingenic, at least until very recently when they acquired a MIPS licence.)

Not that we will necessarily be able to buy these fancy RISC-V variants, 
however. Then again, maybe we'll be proven wrong and the participants will get 
together and develop various fancy features that even appear in readily 
available products that system manufacturers can buy. But again, I don't 
expect anything of significance for the foreseeable future, anyway.

Paul