[Arm-netbook] parallella

[joem]

On Sun, 2013-07-28 at 10:59 +0100, luke.leighton wrote:
> On Sat, Jul 27, 2013 at 11:57 PM, Dr. David Alan Gilbert
> <dave at treblig.org> wrote:
> 
> > A USB-SATA bridge is just *horrible* - it's the whole reason
> > people were looking at the A10 for something with an onboard SATA.
> 
>  iknowiknowiknow.  i was agreeing with ken that a small fpga in large
> enough volume would do a better job and potentially be as
> cost-effective

As an ee I'd have to say it probably won't happen because vast areas
of silicon are wasted and that costs too much and wastes energy.
Where FPGA wins is when there aren't chips that
can do the job. The parallela uses the Zinq to build the custom 
interface from ARM to epiphany processor. That $50 expense
is cheaper than building it out of glue logic.

Personally this strategy screws the epiphany because like all other
parallel cpu mistakes, that custom interface is meant to connect
to other CPUs and extend the number of CPUs,
and your average EE is forced to learn it.
Your average EE has no such interest in it.

What Adapteva should have done is create a shared memory interface
so any third party can connect to it any way it wants
as shared memory RAM port with usual RAM handshaking signals
which is familiar to all EEs.

Some 256 bytes of shared RAM ought to be enough for anyone (TM).

They got 32k RAM per processor, and a common 32K that CPUs share,
so I wonder what they were thinking when they designed it and
didn't allow anyone externally to connect to their shared RAM.

Hopefully they can add shared RAM pins in version 2 and then the
Zinq can be dropped and their parallel CPU would become
easier to adopt more widely. Something like the A10 to the A31 would
then be able to connect to several epiphany CPUs and you would be
able to make good quality graphics engines without having to
drop in FPGA parts into the design.