[Arm-netbook] PCB production

[Hrvoje Lasic]

On Thu, Feb 21, 2013 at 6:07 PM, luke.leighton <luke.leighton at gmail.com>wrote:

> On Thu, Feb 21, 2013 at 12:28 PM, Hrvoje Lasic <lasich at gmail.com> wrote:
> > it is in fact 6 layer in EVK, 4 layer is option but less recommended
> > (at least freescale says so i manual). can you tell me what is the
> > price for pcb you expect in your a10 board?
>
>  i believe it's around $1.50 in large volumes.
>
> > Is this going to be 6 layer?
>
>  yes.
>
> > In our design we will have to use 0.1mm minimum line width, 0.2
> > mm hole and 0.0711 mm minimal thickness of FR4 if we are to follow
> > reference design...
>
>  the A10 EOMA-68 card has to be 1.2mm thickness because of the
> clearance in the 5mm case, as well as there having to be mid-mount
> connectors.  if we went for a 1.5mm height PCB then the connectors
> wouldn't fit (even as mid-mount).
>
> l.
>

tnx for reply. it is helpful.

anyway, we are now approaching this memory problem (high speed design). We
tested Allegro (demo) and as you said it is really horrible software to
use. As I see it it is software for professionals who do only this. If you
do one or two boards a year probably it is waste of time. You have features
like automatic length correction but in real life can you really use this
feature?I think it is really good probability that you will end up manually
making this corrections as usually you don't have enough space on PCB.
Also, as we see it the easiest way is to copy exactly design from EVK (in
this case Freescale) around the DDR2 memory.

Anyway, we belive it is perfectly ok to use software like Kicad or Eagle to
do this design as long as you know what you are doing. There is some free
software where you can calculate impedance of line versus thickness of
dielectric, or characteristics of vias (impedance etc)... Maybe it is good
idea to open one topic discussing various aspects of high speed design and
how some engineers solved the problems around it?
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