[Arm-netbook] Mele A1000 ethernet

Valery Yundin yu.valery+arm at gmail.com
Wed Jul 25 01:34:40 BST 2012


I agree that in principle they could've used just MAC part of dm9000.
But then what would be the reason not to provide information? Davicom
does not make their datasheets secret.

The register pattern is too much different. There are 49 (at least)
32bit registers and they do use values beyond first 8 bits.
For instance mask for packet received interrupt is 1<<8 which is
already second byte. And interrupt status register also uses at least
2 bytes. MAC address is split over two 32 bit values (3+3) instead of
6 continuous bytes. And so on.

There doesn't seem to be any vendor string or alike in these first 49
registers. I might try to check if there is anything beyond that
range.
Also accessing eeprom can be useful, but it is not implemented in the driver.


On 25 July 2012 02:01, lkcl luke <luke.leighton at gmail.com> wrote:
> On Tue, Jul 24, 2012 at 11:28 PM, Valery Yundin <yu.valery+arm at gmail.com> wrote:
>> So it is probably not dm9000 since it is using Realtek rtl8201cp PHY.
>
>  no that doesn't necessarily follow.  all that a PHY IC does is
> convert MII into actual ethernet Tx+/- and Rx+/-, and carries out all
> the paraphernalia associated with that.  it doesn't actually contain
> any "real" ethernet transport logic, in exactly the same way that
> those SATA PHY ICs found a few weeks back don't actually contain any
> "real" SATA transport logic (ok, with the exception of some collision
> detection stuff in the case of ethernet PHY ICs).
>
>  the DM9000 as an actual IC has a slight difference from most other
> MII-capable PHY ICs: it has a special mode which is suitable for
> deployment on general-purpose memory buses (aka high-speed parallel
> ports).  we saw a DM9000 IC being deployed in the GPL-violating
> CT-PC89e so i had to look up how it works.
>
>  so, thinking it through in this case, where the "silicon of the
> DM9000" is now, we speculate, actually on-board the A10 SoC, all
> they'd need do is just hook up the circuits of the DM9000 in "bus"
> mode onto an ARM AHB/AMBA bus, and then output MII off-chip instead of
> ethernet Tx+/- Rx+/-.  so they'd just leave that bit out and
> substitute MII circuits instead.
>
>  so the subtle changes in registers etc. may be to do with how they
> had to connect the "standard" DM9000 circuits onto an AHB/AMBA bus.
> is there a lot of zero-padding for example?  i haven't looked at the
> code, but are the registers by any chance all addressed as 8-bit
> quantities spaced out on 32-bit or 64-bit boundaries with zeros in
> between?  if so, it means that they literally just dropped the
> DM9000's 8-bit bus directly onto a 32-bit (or 64-bit) AHB/AMBA data
> bus!
>
> ... you see what i'm saying?
>
> l.
>



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