[Arm-netbook] Fwd: Exynos4412 Quad Core Board

[lkcl luke]

On Sun, Jul 15, 2012 at 1:04 AM, lkcl luke <luke.leighton at gmail.com> wrote:
> On Sun, Jul 15, 2012 at 12:32 AM, Dr. David Alan Gilbert
> <dave at treblig.org> wrote:
>
>> Hmm - what chip uses this then:
>>
>> http://git.kernel.org/?p=linux/kernel/git/kgene/linux-samsung.git;a=blob_plain;f=arch/arm/mach-exynos/dev-ahci.c;hb=HEAD
>
>  eh? que??  haaang on juuust a minute...
>
>  http://www.hardkernel.com/renewal_2011/products/prdt_info.php?g_code=G132342040298&tab_idx=3
>
>  wooow, look at thaaat.  that SATA interface goes straight to the CPU
> module.  i really wish these f*****rs would make datasheets available.
>  in full. http://com.odroid.com/sigong/nf_file_board/nfile_board_view.php?bid=64

hooraaaay

"Exynos4210 is a 32-bit RSIC cost-effective, low power, performance
optimized and Cortex-A9 Dual Core based
micro-processor solution for mobile phones and netbook applications.

Exynos4210 has an optimized interface to external memory capable of
sustaining the demanding memory
bandwidths required in communication services and memory interleaver
and system MMU to support virtual
addressing for bus masters. The memory system has dedicated DRAM ports
and Static Memory port. The
dedicated DRAM ports support DDR2, LPDDR2 and DDR3 interface for high
bandwidth. Static Memory Port
supports FlexOneNAND, NOR Flash, and ROM type external memory and components.

To reduce the total system cost and enhance the overall functionality,
Exynos4210 includes many hardware
peripherals such as TFT 24-bit true color LCD controller, Camera
Interface, MIPI DSI, CSI, System Manager for
power management, SATA interface, PCI Express interface (not available
with POP option), embedded GPS,
MIPI slimbus interface, five UARTs, 24-channel DMA, Timers, General
I/O Ports, three I2S, S/PDIF, eight IIC-BUS
interface, three HS-SPI, USB Host 2.0, USB 2.0 Device operating at
high speed (480 Mbps), four SD Host and
high-speed Multimedia Card Interface, and four PLLs for clock generation."