[Arm-netbook] EOMA-68. again.
lkcl luke
luke.leighton at gmail.com
Fri Jan 20 07:49:51 GMT 2012
ok, i'm looking at the pinouts again.
two things occurred to me:
1) RGB/TTL has an "enable" pin, VSYNC and HSYNC. these pins are not
very high frequency (clock and data are however).
2) I2C is only a max of 4mhz.
therefore, there's no real need to separate RGB/TTL from anything *if*
the enable pin, vsync and hsync are placed near something that's not
so high frequency.
i2c isn't high frequency, and neither are the GPIOs.
therefore, i think... it may be possible to convert 4 of the GND pins
into signals.
which would leave enough to do either something like 4-bit SPI or
perhaps even allocate them to optional gigabit ethernet.
i believe the same trick applies to EOMA-CF.
what do people think?
also, is it worthwhile dropping the number of GPIO pins (perhaps to
15, 14 or even 12) to make room for an SD/MMC interface?
personally i'm leaning towards the optional gigabit ethernet: you can
do more with that - i think you get more bang-per-buck.
but, it means that SoCs with no gigabit ethernet, those 4 wires are
wasted (no options allowed! that's the rule of standards!
upwards-compatibility is ok though)
choices, choices.... thoughts anyone?
l.
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