[Arm-netbook] IR controller in Allwinner 10

[jonsmirl at gmail.com]

On Sat, Jan 7, 2012 at 3:44 PM, lkcl luke <luke.leighton at gmail.com> wrote:
> On Sat, Jan 7, 2012 at 8:18 PM, jonsmirl at gmail.com <jonsmirl at gmail.com> wrote:
>
>> Note that this has to be a hardware timer pin. The kind that will give
>> you the number of microseconds between edges. It is too hard to time
>> these pulses completely in software. Not all GPIO pins are the same.
>> Only a few will have the timer interrupt capability. You want them to
>> interrupt on each edge and then record the number of microseconds in a
>> FIFO that is gets passed to the kernel's IR subsystem.
>
>  hmmm... there's 32 EINT pins (hardware interrupts).  in a pinch, you
> think that'd do?
>
>  what's the data rate on IR?

It is about 10Kb/sec. That is too fast for normal system timers. You
need a high resolution timer. Most ARM CPUs have hardware timer pins.
They are also used for motor control.

What you have to watch out for is interrupt latency. With the hardware
timer the count gets latched immediately when the edge happens. If you
try to read a timer register in the ISR you now have to take into
account interrupt latency. Depending on what has higher interrupt
priority the latency can mess up the timing of the IR signal and make
it fail to decode.

The timer GPIO method is very reliable and is widely used.


-- 
Jon Smirl
jonsmirl at gmail.com