[Arm-netbook] DDR3...

lkcl luke luke.leighton at gmail.com
Fri Jan 6 19:05:48 GMT 2012

2012/1/6 Henrik Nordström <henrik at henriknordstrom.net>:
> tor 2012-01-05 klockan 22:49 +0000 skrev lkcl luke:
>> whoooooooEE :)
>> http://www.micron.com/~/media/Documents/Products/Data%20Sheet/DRAM/4242Gb_DDR3_SDRAM.ashx
>> does aaaanybody find these paragraphs a tad scary?  memory controller
>> sends out ping-queries to each RAM IC, works out the delay and then
>> uses that in future read/writes.  aaaaah!
> Well, the way I read it is that it's a automatic tuning process for
> compensating small trace length mismatches, done as part of the early
> memory initialization.
> What is the problem?

 it's not a problem - i'm just both deeply impressed and overawed at
the same time.  esp. as some of the newer memory coming out is up at
over 1ghz (making for 2166mhz double-data-rate memory read/write

 that's just amazing.


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