[Arm-netbook] [review] SoC proposal

[lkcl luke]

ok, jecel very kindly did a quick review, and he pointed out that:

* you need a decent testing strategy.

my friend geoff used to work for LSI Logic and then for Samsung: he
came up with a very simple and statistically-accurate 2-state testing
strategy where you test 5 transistors (only!!) on very large pads -
that's enough to tell you if the wafer's "good", then you package it,
and then you run a big application, and measure the average current.
that's it.  they had *zero* returns from their customers.  with the
"normal" approach of doing 80% spot-testing, the standard deviation
and the number of false positives on "fully-comprehensive" testing
were both so high that it was causing massive problems, including
actually damaging the IC during testing.

* consider DDR4 over DDR3

this is a really good point, my only concern being that DDR4 might not
be stable / available.  considering pushing up to 2166mhz DDR3
instead.

there were a couple of other things he pointed out, but i hadn't
mentioned XTensa at the time.

what else... oh yes: i'm giving serious consideration to splitting the
SoC into two - a 160-pin LQFP with nothing but DDR3 RAM and a 2-lane
PCIe v3.0 (which would give a whopping 2gbytes/sec) - and a 160-pin
peripheral chip.

the reason is that LQFP packages are biiiig.  even at 0.4mm pitch, a
304-pin LQFP is, including its legs, 34 mm on a side!  a 160-pin LQFP
comes down to about 19mm x 19mm which is manageable.  two of those is
just about acceptable, side-by-side.

l.