[Arm-netbook] [review] SoC proposal

[Vladimir Pantelic]

lkcl luke wrote:
> On Thu, Feb 9, 2012 at 7:41 AM, Vladimir Pantelic<vladoman at gmail.com>  wrote:
>
>>>     we evaluated the possibility of coping with 1080p30 video decode, and
>>>  worked out that after one of the cores has been forced to deal with
>>>  CABAC decode all on its own, the cores could then carry out the
>>>  remaining parts of 1080p30 decode in parallel, at about 1ghz, quantity
>>>  4.
>>
>>  I would not recommend fully loading the cpu while decoding video, HD
>>  video is becoming a commodity and people might soon use it as an "animated"
>>  wallpaper while doing other CPU intensive stuff
>
>   last year the target speed was 1.5ghz, 4 cores.  this time we
> envisage 8 cores at over 1.2ghz, and the cores can be made to support
> VLIW which can result in 3x the effective clock-rate.  so i don't
> think that CPU horsepower is something to worry about.  the only thing
> that's of concern is to not put too _much_ horsepower down so that it
> goes beyond the gate-count budget.

so you are over-designing the CPU in order to be able to do video
decoding in SW - which all the others by now handle with a tiny HW
block...what is the motivation?