[Arm-netbook] CT-PC89E: 8.9in LCD backlight powerup sequence

[Luke Kenneth Casson Leighton]

this disassembly translates, i believe, to the code below.  the
comments are more important than the code.   GPF pin 14 i _believe_ to
be an IRQ, whilst pin 15 i believe is the actual backlight power.

the parameters i obtained (and posted in the previous message) can, i
believe, be plugged into 2.6.33 or probably better ben's samsung-next
branch.  however fjp noted a compiler error due to a missing file
plat/spi.h in drivers/spi/spi_s3c64xx.c

it will be necessary to create an arch/arm/mach-s3c64xx/mach-ctpc89e.c
copied from e.g. mach-anw6410.c or mach-smdk6410.c and go from there,
substituting those lcd numbers.  pixclock=44106900, actually what the
heck let's cut/paste them here:
pixclock = 0x2a10494

S3C_FB_HFP = 100
S3C_FB_HSW = 1
S3C_FB_HBP = 40

S3C_FB_VFP = 20
S3C_FB_VSW = 2
S3C_FB_VBP = 9

S3C_FB_VFRAME_FREQ = 60

S3C_FB_HRES = 1024
S3C_FB_VRES = 600

anyone want to give that a shot, feel free: i'm off to sleep :)

l.

RAM:C01505B4                 MOV     R12, SP
RAM:C01505B8                 STMFD   SP!, {R11,R12,LR,PC}
RAM:C01505BC                 SUB     R11, R12, #4
RAM:C01505C0                 CMP     R0, #0
RAM:C01505C4                 LDR     R1, =0xF4600000
RAM:C01505C8                 LDR     LR, =0xF4300000
RAM:C01505CC                 BEQ     loc_C0150628
RAM:C01505D0                 LDR     R3, [R1,#0xA0]
RAM:C01505D4                 BIC     R3, R3, #0x30000000
RAM:C01505D8                 ORR     R3, R3, #0x20000000
RAM:C01505DC                 STR     R3, [R1,#0xA0]
RAM:C01505E0                 LDR     R3, [R1,#0xA8]
RAM:C01505E4                 BIC     R3, R3, #0x30000000
RAM:C01505E8                 ORR     R3, R3, #0x20000000
RAM:C01505EC                 STR     R3, [R1,#0xA8]
RAM:C01505F0                 LDR     R3, [R1,#0xA0]
RAM:C01505F4                 BIC     R3, R3, #unk_C0000000
RAM:C01505F8                 ORR     R3, R3, #0x40000000
RAM:C01505FC                 STR     R3, [R1,#0xA0]
RAM:C0150600                 LDR     R3, [R1,#0xA8]
RAM:C0150604                 BIC     R3, R3, #unk_C0000000
RAM:C0150608                 STR     R3, [R1,#0xA8]
RAM:C015060C                 LDR     R3, [R1,#0xA4]
RAM:C0150610                 ORR     R3, R3, #0x8000
RAM:C0150614                 STR     R3, [R1,#0xA4]
RAM:C0150618                 LDR     R3, [LR,#8]
RAM:C015061C                 ORR     R3, R3, #1
RAM:C0150620                 STR     R3, [LR,#8]
RAM:C0150624                 LDMFD   SP, {R11,SP,PC}
RAM:C0150628 ; ---------------------------------------------------------------------------
RAM:C0150628
RAM:C0150628 loc_C0150628                            ; CODE XREF:
s3c_set_backlight_power+18j
RAM:C0150628                 LDR     R3, [R1,#0xA0]
RAM:C015062C                 BIC     R3, R3, #0x30000000
RAM:C0150630                 STR     R3, [R1,#0xA0]
RAM:C0150634                 LDR     R3, [R1,#0xA8]
RAM:C0150638                 BIC     R3, R3, #0x30000000
RAM:C015063C                 ORR     R3, R3, #0x10000000
RAM:C0150640                 STR     R3, [R1,#0xA8]
RAM:C0150644                 LDR     R3, [R1,#0xA0]
RAM:C0150648                 BIC     R3, R3, #unk_C0000000
RAM:C015064C                 ORR     R3, R3, #0x40000000
RAM:C0150650                 STR     R3, [R1,#0xA0]
RAM:C0150654                 LDR     R3, [R1,#0xA8]
RAM:C0150658                 BIC     R3, R3, #unk_C0000000
RAM:C015065C                 ORR     R3, R3, #0x40000000
RAM:C0150660                 STR     R3, [R1,#0xA8]
RAM:C0150664                 LDR     R3, [R1,#0xA4]
RAM:C0150668                 BIC     R3, R3, #0x8000
RAM:C015066C                 STR     R3, [R1,#0xA4]
RAM:C0150670                 LDR     R3, [LR,#8]
RAM:C0150674                 BIC     R3, R3, #1
RAM:C0150678                 STR     R3, [LR,#8]
RAM:C015067C                 LDMFD   SP, {R11,SP,PC}
RAM:C015067C ; End of function s3c_set_backlight_power

if (R0 == 0) goto loc_C0150628;

/* bank F, pin 14, setcfg set 0x2 means "request eint on pin 14"? */
*(S3C_GPIO_BANKF) &= ~0x3<<(14*2);
*(S3C_GPIO_BANKF) |= 0x2<<(14*2);

/* bank F, pin 14, pullup updown set 0x2 */
*(S3C_VA_GPIO+0xA8) &= ~0x3<<(14*2);
*(S3C_VA_GPIO+0xA8) |= 0x2<<(14*2);

/* bank F, pin 15, setcfg set 0x1 means "output" */
*(S3C_GPIO_BANKF) &= ~0x3<<(15*2);
*(S3C_GPIO_BANKF) |= 0x1<<(15*2);

/* bank F, pin 15, pullup updown set 0x0 */
*(S3C_VA_GPIO+0xA8) &= ~(0x3<<(15*2));

/* bank F, pin 15, set */
*(S3C_VA_GPIO+0xA4) |= 0x1<<(15);

/* timer */
(*S3C_TCON) |= 1;

return;
loc_C0150628:
/* bank F, pin 14, setcfg , set 0x0 means "input" */
*(S3C_GPIO_BANKF) &= ~0x3<<(14*2);

/* bank F, pin 14, pullup updown set 0x1 */
*(S3C_VA_GPIO+0xA8) &= ~0x3<<(14*2);
*(S3C_VA_GPIO+0xA8) |= 0x1<<(14*2);

/* bank F, pin 15, setcfg set 0x1 means "output" */
*(S3C_GPIO_BANKF) &= ~(0x3<<(15*2));
*(S3C_GPIO_BANKF) |= 0x1<<(15*2);

/* bank F, pin 15, pullup updown set 0x1 */
*(S3C_VA_GPIO+0xA8) &= ~(0x3<<(15*2));
*(S3C_VA_GPIO+0xA8) |= 0x1<<(15*2);

/* bank F, pin 15, clear */
*(S3C_VA_GPIO+0xA4) &= ~(0x1<<(15));

/* timer */
(*S3C_TCON) &= ~0x1;