[Arm-netbook] libre 64-bit risc-v SoC

[Luke Kenneth Casson Leighton]

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crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68


On Fri, Apr 28, 2017 at 11:35 AM, mike.valk at gmail.com
<mike.valk at gmail.com> wrote:

> Perhaps put it sirectly to an USB bridge.

 no.  very important to keep it simple.  by wiring something like an
STM32 directly to the 2 UART wires the STM32 can do the job of an FTDI
dongle, but it can also be reprogrammed into an openocd interface, as
well as contain the bootloader (and plug that manually directly into
SRAM over the debug interface).

 i discussed this all with dan, the developer of zipcpu, it's what he
*already* does.

> UART's on debugging hardware is
> non existant. We all use FTDI dongles.
>
> Look like OpenCores has a module. https://opencores.org/project,usb2uart

 spoke to the developer of zipcpu (dan).  he's the one that has the
DDR3 controller on opencores.

l.