[Arm-netbook] Mele A1000 ethernet

lkcl luke luke.leighton at gmail.com
Wed Jul 25 01:01:27 BST 2012


On Tue, Jul 24, 2012 at 11:28 PM, Valery Yundin <yu.valery+arm at gmail.com> wrote:
> So it is probably not dm9000 since it is using Realtek rtl8201cp PHY.

 no that doesn't necessarily follow.  all that a PHY IC does is
convert MII into actual ethernet Tx+/- and Rx+/-, and carries out all
the paraphernalia associated with that.  it doesn't actually contain
any "real" ethernet transport logic, in exactly the same way that
those SATA PHY ICs found a few weeks back don't actually contain any
"real" SATA transport logic (ok, with the exception of some collision
detection stuff in the case of ethernet PHY ICs).

 the DM9000 as an actual IC has a slight difference from most other
MII-capable PHY ICs: it has a special mode which is suitable for
deployment on general-purpose memory buses (aka high-speed parallel
ports).  we saw a DM9000 IC being deployed in the GPL-violating
CT-PC89e so i had to look up how it works.

 so, thinking it through in this case, where the "silicon of the
DM9000" is now, we speculate, actually on-board the A10 SoC, all
they'd need do is just hook up the circuits of the DM9000 in "bus"
mode onto an ARM AHB/AMBA bus, and then output MII off-chip instead of
ethernet Tx+/- Rx+/-.  so they'd just leave that bit out and
substitute MII circuits instead.

 so the subtle changes in registers etc. may be to do with how they
had to connect the "standard" DM9000 circuits onto an AHB/AMBA bus.
is there a lot of zero-padding for example?  i haven't looked at the
code, but are the registers by any chance all addressed as 8-bit
quantities spaced out on 32-bit or 64-bit boundaries with zeros in
between?  if so, it means that they literally just dropped the
DM9000's 8-bit bus directly onto a 32-bit (or 64-bit) AHB/AMBA data
bus!

... you see what i'm saying?

l.



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