[Arm-netbook] pinouts, gpio, expansion header

[lkcl luke]

On Mon, Jan 9, 2012 at 3:20 AM, Bari Ari <bari at onelabs.com> wrote:
> My understanding is that the FIR interface is muxed with UART2 and
> supports SIR, CIR,MIR and FIR.
>
> I'll be sure to go over all the muxed pins and let everyone chime in
> before we finish the board layouts to make them as flexible as possible.

 i've been going over the pinouts and documented the options here, if
anyone would like to help go over this:

 http://rhombus-tech.net/allwinner_a10/orders/
 http://rhombus-tech.net/allwinner_a10/pinouts/

 attached is a first revision (diagram)

    * 2pins: 1x USB-2
    * 8pins: 5-pin AC97 shared with 8-pin I2S Signals.
    * 2pins: PWM0 (PB2) and PWM1 (PI13)
    * 2pins: IR_TX and IR_RX (also GPIOs, one of which is EINT16)
    * 4pins: TV-Out
    * 4pins: 4-wire Resistive Touchscreen
    * 20pins: 2x LVDS

 almost all of those can be muxed to general-purpose IO, giving about 34 GPIOs

 then, also, by putting the other RGB/TTL (not the LVDS-capable one)
onto the 68-pin connector it would be possible to flip those pins over
to an IDE (PATA) port.

 i still haven't worked out what the GPIO pins should be.  definitely
more of the EINTNN pins.  possibly one of the SD/MMCs, probably one of
the SPIs: i haven't put one of those out anywhere, at all.  probably
one of the UARTs as well.

 hmmm... PI10 through to PI21 seem to be good candidates:

# C17 SPI0_CS0/UART5_TX/EINT22/PI10
# D17 SPI0_CLK/UART5_RX/EINT23/PI11
# C16 SPI0_MODI/UART6_TX/EINT2/PI12
# D16 SPI0_MISO/UART6_RX/EINT25/PI13
# C15 SPI0_CS1/PS2_SCK1/TCLKIN0/EINT26/PI14
# D15 SPI1_CS1/PS2_SDA1/TCLKIN1/EINT27/PI15
# E17 SPI1_CS0/UART2_RTS/EINT28/PI16
# E16 SPI1_CLK/UART2_CTS/EINT29/PI17
# E15 SPI1_MOSI/UART2_TX/EINT30/PI18
# D14 SPI1_MISO/UART2_RX/EINT31/PI19
# E14 PS2_SCK0/UART7_TX/HSCL/PI20
# E13 PS2_SDA0/UART7_RX/HSDA/PI21

and maybe these:
# A7 UART0_TX/IR1_TX/PB22
# B7 UART0_RX/IR1_RX/PB23

and, if nothing else, probably these:
# C8 TWI2_SCK/PB20
# C7 TWI2_SDA/PB21

although if there are 2 left, it might be worthwhile doing analog
audio out, somehow, even if it means a bit of extra circuitry.

it's tricky because bizarre as it sounds we're running out of pins to
choose from! :)  pingroups A, C, D and S are already taken up.  the
ones in the "other" group are hard-wired and not GPIO capable.

thoughts anyone?


 btw no i do *not* think it would be a good idea to have the
LVDS-capable port on the 68-pin connector.  not only would it then not
be possible to conveniently get access to the PATA port, but also it
would risk people going "oh look!  LVDS!  let's make a
cheapo-motherboard that doesn't bother to respect EOMA-compliance".

 to be successful, standards have to be absolutely non-optional: it's
enough of a risk to have these multiplexing options on the very first
CPU card.

 if that's not clear enough, allow me to go through it.  what happens
if LVDS is available as an "option" alongside RGB/TTL?

 a) motherboards get created which have to be capable of detecting
either LVDS _or_ RGB/TTL capable CPU cards.  the cost has therefore
just gone up.

 b) *all* CPU cards *must* now have circuitry (if the CPU doesn't have
the exact same pinouts as the Allwinner A10) which flips LVDS _or_
RGB/TTL onto the 68-pin connector.  the cost has therefore gone up.

 either way, putting LVDS and RGB/TTL onto the 68-pin connector
actually, far from providing nice benefits, actually destroys the
entire project's viability.  for the sake of a $1 IC (in higher-cost
products anyway).

 l.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: expansion.png
Type: image/png
Size: 15986 bytes
Desc: not available
Url : http://lists.phcomp.co.uk/pipermail/arm-netbook/attachments/20120109/abaacad7/attachment-0001.png