[Arm-netbook] [review] SoC proposal

Tony Garnock-Jones tonyg at ccs.neu.edu
Wed Feb 8 20:16:34 GMT 2012

On 02/08/2012 02:58 PM, lkcl luke wrote:
> that means that it could be used in at least the following products: [everything]

It sounds *amazing*. Is the cache coherency done in software, as you 
mentioned near the top of your message? What size caches would exist on 
each core?

(I read on the FONC list the other day about a Tilera-based setup where 
a full Smalltalk image was running entirely in the 2MB of L2 of each 
core, treating main memory as remote storage...)


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