On Tue, Aug 1, 2017 at 7:51 AM, mike.valk@gmail.com mike.valk@gmail.com wrote:
2017-08-01 12:29 GMT+02:00 Luke Kenneth Casson Leighton lkcl@lkcl.net:
there's a lot of other stuff in here which is really good, such as making sure that lengths on each *layer* are matched, and that even when turning corners the lengths are matched. and matching just after VIAs *not* before... damn
Between via's the length should be matched right? Length mismatch should be solved as soon as possible to accommodate eddy-currents right?
Correct on both counts.
Found a nice post from TI https://e2e.ti.com/blogs_/b/analogwire/archive/2015/06/10/differential-pairs...
Thanks for the link to an interesting article. Thankfully we are well below 10GHz on this interface and have 0 stub length as our signals traverse the via all the way from top to bottom or vice versa. We do have the option to specifically adjust the antipad or keepout sizes around our vias. More discussion of this topic in the upcoming section on impedance.