On Tue, Dec 19, 2017 at 11:40 PM, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
okaay, so this is what i've done: expanded the layer 1 keepout (manually) to as near to 15mil as i can get.
Sounds good. I think this would be a good thing for both the TOP (layer 1, red) and BOTTOM (layer 6, blue) along the path of the high-frequency signals (differential pairs). I see it on the BOTTOM but not from the vias towards the ESD component on the TOP? We know ahead of time there will be things that can't move outside the keepout but it will at least keep the ground fill at bay.
then added 2 keepouts on layers 2 and 5. the line on the right is the board edge, so it goes *right* out: the connector shield is there, i figure it can catch EMI. plus there's layers 3 and 4 GND plane.
layer 5 is over BOTTOM (6, blue), that one i made just a rectangle, extending out an extra 5 mil. however there's obviously VIAs in it which... really... why make it 5 mil beyond and you still have those VIAs? also, should i put a horizontal track across on Layer 5, say 10mil wide, between the 3 GND vias down the middle?
layer 2 is under TOP (1, red), the shape is a little more... slightly messy, it goes round the connector (again extending right out over the board edge, otherwise not enough space to maintain 15mil clearance), and this time because there *is* no keepout area on layer 6 (should there be one? i think i should, really.... hmmmm.) i brought the keepout to within 15 mil of the ESD...
hmmm... i'll add an extra keepout area around where those red (layer
- tracks are, i think.
thoughts / corrections appreciated
Good work, Luke! Let me try to clarify my recommendations as they seem to have been mixed into one formula:
1. Around high-frequency differential pairs (regardless of layer) try to maintain ~10mil keepout for at least the ground fill in the same layer (BOTTOM = layer 6, blue; TOP = layer 1, red) from the ground and signal vias to the connector. Then terminate the keepout (let it go to the 5mil rule) around the connector on TOP=layer 1. This is a nod to the fact that the spacing of pads is very close anyway.
2. Under ESD components with high-frequency differential pairs: i. I would connect the ground vias along the center ground track on every layer with a 10mil track, if not ground plane or fill. ii. I would create a void in the close ground plane (layer 2 for the ESD component on TOP=layer 1, layer 5 for the ESD component on BOTTOM=layer 6) under the path (pads) of the high-frequency differential pairs. One keepout/void for each differential pair in light of (i) above. iii. On the next deeper layer (layer 3 for the ESD component on TOP=layer 1, layer 4 for the ESD component on BOTTOM=layer 6) create a ground fill connected, if possible to the ground vias in the center of the ESD component and the vias at the corners.
3. Under the high-frequency connector pads, a keepout on layer 2 (3 and 4) ground fill. The intent is that under the HTX?{P|N} connector pads no copper till layer 5 ground fill.
Attached pictures hopefully elucidate the situation. Let me know if anything seems amiss or you have any questions.
