okaay, so this is what i've done: expanded the layer 1 keepout (manually) to as near to 15mil as i can get. then added 2 keepouts on layers 2 and 5. the line on the right is the board edge, so it goes *right* out: the connector shield is there, i figure it can catch EMI. plus there's layers 3 and 4 GND plane.
layer 5 is over BOTTOM (6, blue), that one i made just a rectangle, extending out an extra 5 mil. however there's obviously VIAs in it which... really... why make it 5 mil beyond and you still have those VIAs? also, should i put a horizontal track across on Layer 5, say 10mil wide, between the 3 GND vias down the middle?
layer 2 is under TOP (1, red), the shape is a little more... slightly messy, it goes round the connector (again extending right out over the board edge, otherwise not enough space to maintain 15mil clearance), and this time because there *is* no keepout area on layer 6 (should there be one? i think i should, really.... hmmmm.) i brought the keepout to within 15 mil of the ESD...
hmmm... i'll add an extra keepout area around where those red (layer 1) tracks are, i think.
thoughts / corrections appreciated
l.
