On Sep 23, 2017, at 03:47, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
On Sat, Sep 23, 2017 at 8:26 AM, Richard Wilbur richard.wilbur@gmail.com wrote: […] so it's just something weird about the flood-fill on layer 3, possibly due to it being a copper pour not a "plane area". don't know. if absolutely necessary i can put in some tracks that split the pairs.
I guess we don't have to worry about layer 3 if it's going to be that uncooperative and we don't gain that much by making the desired changes.
It would be nice to change layer 3 to make the signal path more uniform on the way through the vias but it's not the end of the world if we can't, as long as layers 2 and 5 resemble layer 4 in the vicinity of the HDMI differential signal vias adjacent to the A20.
i have to use it as a signal layer, so there's tracks running round the back of some of the diff-pair VIAs.
Not a big deal.
The remaining questions are where do we impose 5mil clearance (by bringing in the fill), where do we start tapering, and what does the taper look like? Likewise, but in reverse order, at the other end.
yehyeh
If we choose to have copper fill at both ends with 5mil clearance--which will go a long way towards keeping the fields symmetric where we are trying to sort things out and don't have the space to consistently maintain a larger clearance--then in order to keep the fields symmetric as we taper up to larger clearance we need to first bring the differential pairs alongside each other at 5mil inter-pair spacing (between pairs or pair-to-pair). This is so we have better control of spacing because the smallest copper we can insert is 5mil but the smallest space is much smaller.
Then to taper up, we have two options: 1. spread in both directions from the inner 2 pairs, or 2. spread to one side or the other. If we spread from the middle then the inner two pairs end up shorter than the outer two whereas if we spread from one side the straight pairs will be shorter then those which tapered away. I'm going to suggest that when we spread we move to the left which would lengthen the CLK lines more than any other.
Also, the taper at the ESD end should fold in from the bottom (CLK side). At that end maybe we come from 15mil to 7mil before the ESD lands, if that's the best consistent clearance through the ESD lands, then taper to 5mil before the constraining copper and maintain 5mil to the connector.
so. layer 1. surrounded, all 5mil. tracks are only 60mil or so to the VIAs. didn't do a keepout. all 5mil.
layer 3 (the VIAs) - some sort of curve on the flood-fill, it's 5mil but there's a void in the middle.
Are layers 2, 4, and 5 also 5mil away from the differential signal at the vias?
yes. layer 3 is the only exception.
Good. Then for the HDMI high-frequency effort we can pretty much ignore it--especially if we can't fix the source of non-uniformity/asymmetry.
layer 6, starts @ 5mil, expands out to 15mil (mostly). exceptions: distance to TX2 "long wiggle" is 7mil, distance from bottom VIAs along board edge (to TXC), 11.2mil, distance to track *between* the VIAs 15mil. distance to GND vias ABOVE the hdmi tracks (TX2), 19mil.
in theory then i could move the entire set of horizontal tracks up by... 4 mil... i reeaallly don't want to though as it means redoing the whole f*****g lot of wiggles.... argh :)
Can't select and move?
you can... but there are special rules which ensure that 45 degree angles on two adjacent segments are "respected". it gets extremely weird and extremely frustrating.
Since it is such a long section it would be beneficial to move the traces.
argh. i kinda reached that conclusion :)
what i can do to some degree is manually enter values (adding 4mil up and 4 mil left/right) so that there's less to redo by hand.
So if we bring in the keepout at 5mil on layer 6 and taper it slowly to 7mil by the point we get to the TX2 wiggle which exhibits 7mil clearance. To make this work we have to start the pairs off around 5mil inter-pair spacing and then spread them as we taper the keepout. I realize this is more complicated than what I first described.
it's too much. i can just about manage adding 4mil manually to every single one of those long straights, moving them up from the 11mil clearance to the bottom board-line VIAs to 15mil, thus taking 4mil off that 19mil clearance and resulting in 15mil there as well.
we don't have *room* for 7 mil inter-pair spacing.
if i've misunderstood, do let me know.
I'm pretty sure you have misunderstood: We presently have 15mil inter-pair spacing (distance between adjacent pairs) over most of the length and 5mil intra-pair spacing (distance between traces within a pair).
yehhh there are so many GND vias at the ESD end i'd question its effectiveness...
You'd question the effectiveness of what? The ESD component? The taper?
putting in a taper at the end is significantly disrupted by the presence of non-removable VIAs. you can *add* a taper... but then the VIAs (which cannot be moved) are *already* within about 5mil or 7mil of the tracks.
what *would* work is bringing the taper in *BEFORE* the ESD components. it also coincides with the double 45-degree bending of the group of tracks, so is still a bit... dodgy.
see this picture for reference: http://rhombus-tech.net/allwinner_a10/news/eoma68-a20-275-layer6-hdmi.jpg
basically there's no point in tapering *after* the ESD components because the GND vias are already closer than the taper would bring GND in.
I agree. I was going to suggest tapering down the keepout along with the inter-pair spacing before we get to the ESD lands. Maybe even before we get to the vias.
I realize this could interfere with the intra-pair skew compensation at the corners if we don't work out the logistics carefully.
If we have to choose an end to work on, I'd pick the connector end as it's further from the signal source and thus more likely to cause signal integrity issues.
