On Mon, Jul 3, 2017 at 4:31 PM, Richard Wilbur richard.wilbur@gmail.com wrote:
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On Jun 29, 2017, at 20:45, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote: On Fri, Jun 30, 2017 at 3:32 AM, Richard Wilbur richard.wilbur@gmail.com wrote:
Have you identified which signals are affected?
no - i do not have access to equipment which will allow me to make such a determination.
I'll check to see whether I can get some lab time up at the university (where I took the lion's share of my electrical engineering coursework).
Have you been able to determine which signals are leaking into the affected signals?
ditto... basically this is all guess-work and experimentation.
Well congratulations on many good guesses and what sounds like a relatively successful experiment!
The fact that I don't know the layer stack for the board
6 layer FR4 1.2mm, top gnd sig, pwr, gnd, bot.
throws in some more uncertainty. I don't know whether those differential pairs were spending a lot of time over a ground plane. When the differential pairs crossed paths did they do so over separate ground planes, et cetera?
i'm now restricting the dff pairs to top and bottom. the majority of time is bottom. space at the edge is now sufficient to do that.
ok, so what i'm planning to do, richard, is a redesign of this entire area, starting by widening the PCB by 1mm.
Does that still meet your design goal for EOMA68 form factor?
yes. actually without the expansion the plastic surround flops about and the casework can drop off. with the extra size the plastic edges stay in place and the catches along the metal case then also stay in place.
this should allow me to put several diff-pairs on the same layer (i'll start by trying to put them all on layer 3, see how that goes).
You said the board has 6 layers. Does that mean layer 3 is in the midst of the stack or on the outside?
yes but next to the power plane, where i have run 5V power and 3.3v (and can't move them).
If it's inside, you could use striplines for the differential pairs. It'll require three layers (two of them ground) but it is about as close to a TEM waveguide as you can get in a PCB.
would you be happy to advise before it goes to pre-production?
I would be overjoyed to put this somewhat arcane knowledge to some good use. In other words, "Yes!"
yay!
Reading an application note on HDMI from Texas Instruments[*] I noticed they mentioned a clock rate of 340 MHz and
340mhz is not as bad as i was expecting.
l.