On Jul 3, 2018, at 03:19, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
On Tue, Jul 3, 2018 at 1:57 AM, Richard Wilbur richard.wilbur@gmail.com wrote:
By the way, what is the status of the microdesktop design v1.7? Have you already invested in parts (specifically the 2x10 header) and/or circuit boards?
yep all good. the funds that were transferred to mike 18+ months ago ($60k) are down to around $45k now and he's got most of that left with which to order components for the 1.7 md and 2.7.5 card.
I was asking with regard to the possibility of releasing a microdesktop v1.8 with a few refinements (presumably electrical/electronic changes that fit within the same form factor, id est, no change to the case).
Why? 1. Open up more possibilities for experimentation by tripling the number of GPIO lines available at expansion connector(2 → 6). 2. Add soft-start to the power regulator for 3.3V supply. 3. Support VESA DDC Plug and Play monitor detection regardless of power-up order between monitor and computer.[1] 4. Improve signal quality (and reduce radiated/coupled EMI) for VGA interface. 5. Improve Electro-Static Discharge protection (page 1 of the schematic says: “TODO: ESD protection”).
How? 1. Bring the remaining 4 GPIO lines from the EOMA68 connector (J14 pins 20,54,21,55) to the expansion header(J5). Dropping VESA_SCL and VESA_SDA lines from J5 (available and used on VGA connector J4) gets us two pins for free. Then we either get a larger connector (2x11 instead of 2x10), find two other signals to drop from the expansion header (EOMA68-I2C_SCL, EOMA68-I2C_SDA which are connected to the serial EEPROM for chassis identification?), or decide we are happy to have doubled the GPIO presence (2 → 4) and stop. 2. Add a 10K Ohm resistor between +5V and Enable(pin 1) on U9. 3. Add another SY6280 current limiter for +5V and connect to VGA pin 9 (VESA power). Seems to be some difference of opinion on current requirements: 50mA[2], 300mA-1000mA[1]. If we were to limit at 300mA, it should easily supply the needs of I2C serial EEPROM and probably not over-tax our power supply. 4. Route signals as high-speed/frequency pairs.[1] A. Change the name of VGA pins(J4): pin Name 5 HSYNC_RTN 6 RED_RTN 7 GREEN_RTN 8 BLUE_RTN 9 PWR 10 VSYNC_DDC_RTN B. Make sure the following pairs are routed as microstrip pairs from connector pins to signal driver: VGA_ROUT/VGA_R(1), RED_RTN(6) VGA_GOUT/VGA_G(2), GREEN_RTN(7) VGA_BOUT/VGA_B(3), BLUE_RTN(8) VGAHSYNC/VGA_HSYNC(13), HSYNC_RTN(5) VGAVSYNC/VGA_VSYNC(14), VSYNC_DDC_RTN(10)
Return lines should connect to ground pins of signal driver and/or ground side of power supply decoupling capacitor at signal driver. The first three pairs (video lines) should be over unbroken ground plane as they are the highest-frequency lines (12.6MHz-388MHz depending on video mode).
Add VREFTTL decoupling capacitor next to R12 and R8 (pull-ups for VESA_SCL and VESA_SDA) then route the following pairs from VGA connector to pull-ups/decoupling capacitor ground: VESA_SDA/SDA(12), VSYNC_DDC_RTN(10) VESA_SCL/SCL(15), VSYNC_DDC_RTN(10)
5. Filter VGA cable shield connection to ground with ferrite beads (J4 pins 16,17). Likewise USB2 ports (J11, J3) pins M0 and M1. Also EOMA68 connector (J14) pins “0”, “0/2”, if those are connector shield connections? What are J14 pins 73 and 74? (They are labelled “GND” but left unconnected?)
We don't have a metal chassis here to connect the shields directly to. If we did, I'd suggest connecting shields to chassis ground and then ferrite bead to separate chassis ground from power/signal ground.
For VESA_SDA and VESA_SCL, add diode limiters connected to ground similar to ESD117-ESD123 on the SD bus lines provided the diode-limiting voltage is greater than VREFTTL nominal range. Otherwise use BAT54S connected between ground and VREFTTL.
Add BAT54S connected between ground and USB2VBUS across USB2 data lines EOMA68-DM0, EOMA68-DP0, DM2, DP2.
Just some thoughts. ;>)
Richard
References: [1] https://en.wikipedia.org/wiki/VGA_connector [2] https://en.wikipedia.org/wiki/Display_Data_Channel