On Thu, Dec 28, 2017 at 9:56 PM, Bill Kontos vkontogpls@gmail.com wrote:
On Wed, Dec 27, 2017 at 11:08 AM, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
so, ahh i would say it's christmas come early but it really *is* christmas :)
unlike many people to whom i've pitched the idea of an entirely libre SoC, madhu instead responded, "ok sure, what would you like?". initially being rather confused by this positive response, i outlined this page http://rhombus-tech.net/riscv/shakti/m_class/ and slowly began asking more questions.
Love it. One of the few times national interests happen to be the same as those of the free world movement. Also amazing answer. If this goes well it will go down in history as one of those famous conversations in the early days of tech we read about.
yehyeh!
So we have the chance to get a node ahead AND RISCv64 ? Awesome.
frickin tell me about it. madhu's even been offered free access to ASIC design tools from various companies normally worth $80m. they've seen what his team did with PowerPC before they converted to RISC-V, so they know he's serious and represents the best opportunity to gain access to a MASSIVE billion+ people untapped market
- finding the right team(s) of people with links to the free software
community to target 3D, Video and so on.
This is something that I don't get with the shakti project. How are they planning to tackle the 2d/3d/vpu problem?
that's where i need help, they're primarily focussed on the CPU part. madhu is so excited and fired up by the opportunity he's been given, and also he wants to push the technology his team is designing (for very good reasons, will explain later), that he's in danger of going down the "NIH" route. he *is* however keenly aware of things like the MIAOU project.
so for my part i've tracked down the ORSOC Graphics Accelerator, a series of white papers by MIPS... *before* the dead-or-dying ImgTec took them offline - which describe how certain Vector and SIMD instructions (a 1/(x^2) instruction, and half-precision operations) and MMX instructions (bit-wise larrrge NAND/NOR zero detection) can *massively* improve plain mesa3d software operations.
also on opencores there's a series of hard macros with basic video primitives, including cabac decode and many more: dropping lots and lots of those in will go a long *long* way towards being able to tackle 2D, 3D and a VPU.
the key here though is: it is *really* necessary to find a full software team to get the userspace stuff done *at the same time* and on emulated FPGAs so that performance can be verified / estimated.
From my understanding there aren't any libre designs available out of the box, cpu rendering is expensive and wasteful,
ordinarily, yes. however.... each shakti core only takes 0.12W. we can put 16 down and still meet a 2.5 watt budget. how d'ya like _them_ apples? :)
anything memory compression related is patented
wait.... are you telling me that RISC-V's memory / instruction compression is *patented*?? if so, by whom?
and pretty much required when talking about ddr and not gddr and their page doesn't detail anything about that.
yeah forget GDDR for now. there already exists a DDR3 controller design. the DDR *PHY* however madhu wants his team to tackle that,
Also external gpus are out of the question for obvious reasons.
not for the higher-end desktop / server class units but this is a SoC... so yeah.
now, it turns out that *IF* the processor is designed SUCH THAT it is desirable for use in the indian schools market - either as laptops, netbooks, tablets or desktop machines (laptops would be better), THEN it is a near-automatic process of getting to market, orders of 10 million units are not a problem.
Sounds like magic to my ears.
f****n'A that's an understatement :)
note that *this is exactly what the EOMA68 Libre Laptop Housing is for*, and would be an immediate base on which to get demo units in front of people, very very quickly (just have to take care of making an EOMA68-RISCV64 Card).
Indeed, and it would mean you could consider getting molds done as well instead of 3d printing the cases.
... easily justifiable
so, any ideas, input etc. welcomed.
Be wary of the 20nm node. From my experience phones of that generation were the first to have overheating problems. Power leaking is very high. I know there have been some new nodes at 20nm recently with better characteristics though.
rrriiight, ok that would explain
Also I'd like to see the faces of the RPi foundation if this comes into fruition. 20nm vs 40nm all libre and mainline huge volumes and at the same price ballpark as the RPi but without the cartel control they enjoy. Good luck Luke, you really deserve this.
thx... well... we all do. i'm just the messenger, i *really* need to find the right people.
l.