On Jan 3, 2018, at 05:03, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
ok i'm done with the 0805 10uF capacitors, and mostly-done messing about looking at the gerber files for areas where ground tracks are missing. currently i've added a keepout area around the DDR3 lines because that's what i've seen done in other designs.
gotta get moving on this, richard - it'll be another 5-6 weeks if we miss the window of opportunity before chinese new year.
My initial feedback is it looks pretty nice. I sat down, read the documentation for the gerber viewer that comes with KiCAD and started getting my feet wet.
One recommendation for now as I have to leave for choir rehearsal--do the same thing with additional ground traces north and south of the ESD pads on layer 6 as you did on layer 1 to bring the distance between pad and ground down from 15mil to around the same as the pad-to-pad spacing of the ESD component pads.