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<p>Wouldn't the PCMCIA card thickness be an issue when using a CPU
module?<br>
</p>
<br>
<div class="moz-cite-prefix">On 05/11/2017 07:05 AM, Ismo Väänänen
wrote:<br>
</div>
<blockquote
cite="mid:CAFJ14aMk263EWyxAa996VtTE5v4tfYWG1w5P-pCitx6PJYh0Tg@mail.gmail.com"
type="cite">
<div dir="ltr">Hello,
<div><br>
</div>
<div>The recent talk about de-blobbing R8 and thus also GR8
inspired me to do a quick write up on how I see a Next Thing
Co. GR8 System-In-Package chip being used in an EOMA68
compatible card. </div>
<div>The latest version of the write up can be found here:</div>
<div><a moz-do-not-send="true"
href="https://sites.google.com/site/oh2ftg/eoma68/eoma68-gr8">https://sites.google.com/site/oh2ftg/eoma68/eoma68-gr8</a><br>
</div>
<div><br>
</div>
<div>I named the project "<span
style="color:rgb(0,0,0);font-family:verdana,helvetica,arial,sans-serif;font-size:13.3333px">EOMA68-GR8"
because why not. </span></div>
<div><span
style="color:rgb(0,0,0);font-family:verdana,helvetica,arial,sans-serif;font-size:13.3333px"><br>
</span></div>
<div><span
style="color:rgb(0,0,0);font-family:verdana,helvetica,arial,sans-serif;font-size:13.3333px">Like </span><span
style="font-size:12.8px">Vincent I'm doing this on the side
and also with Altium. </span></div>
<div><span style="font-size:12.8px">I haven't done anything this
complex in Altium before it's likely going to be an
interesting challenge. </span></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">GR8 has TTL/RGB LCD
interface, USB2.0, I2C, SPI(SDMMC) and so on. </span></div>
<div><span style="font-size:12.8px">All the interfaces to make a
compute card compatible with EOMA68 are there.</span></div>
<div><span style="font-size:12.8px">Except if I want the card to
have "front facing" USB I'll need to include some USB HUB
chip like TI TUSB2046</span><span
style="color:rgb(0,0,0);font-family:verdana,helvetica,arial,sans-serif;font-size:13.3333px">,
which conveniently has no firmware being a state machine. </span></div>
<div><span
style="color:rgb(0,0,0);font-family:verdana,helvetica,arial,sans-serif;font-size:13.3333px"><br>
</span></div>
<div><span
style="color:rgb(0,0,0);font-family:verdana,helvetica,arial,sans-serif;font-size:13.3333px">I'll
have to look at how the interrupts go, at AXP209 PMIC and
it's routing.</span></div>
<div><font color="#000000" face="verdana, helvetica, arial,
sans-serif"><span style="font-size:13.3333px">And decide on
if I'll layout the NAND as the talk about blobs being
required for NAND support sounds worrying. That and seeing
in general if even a half reasonable layout is possible on
4-layer FR4 to get cheaper rates on the pcb's. At least
there's no DDR RAM to route, but the TTL/RGB fanout and
length matching is gona be chore.</span></font></div>
<div><font color="#000000" face="verdana, helvetica, arial,
sans-serif"><span style="font-size:13.3333px">One more good
reason to learn how the automated length matching in
Altium works. </span></font></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">Sourcing connectors and
housings in small quantities. All that fun stuff. </span></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div>If anything I have missed comes to mind please mention it,
I'd rather hear it now then when I have prototype pcb's at
hand or layout nearly done. <br>
</div>
<div><br>
</div>
<div>Cheers,</div>
<div>Ismo Väänänen de OH2FTG alias 2ftg</div>
<div><span
style="color:rgb(0,0,0);font-family:verdana,helvetica,arial,sans-serif;font-size:13.3333px"><br>
</span></div>
<div><span
style="color:rgb(0,0,0);font-family:verdana,helvetica,arial,sans-serif;font-size:13.3333px"><br>
</span></div>
<div><br>
</div>
</div>
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