<br><br><div class="gmail_quote">On Thu, Mar 28, 2013 at 1:05 AM, luke.leighton <span dir="ltr"><<a href="mailto:luke.leighton@gmail.com" target="_blank">luke.leighton@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div class="im">On Wed, Mar 27, 2013 at 6:12 AM, Ajith Kumar <<a href="mailto:bpajith@gmail.com">bpajith@gmail.com</a>> wrote:<br>
</div><div class="im">> Hello,<br>
> A rough schematic of an A10 based SBC has been done in Kicad,<br>
<br>
</div>great. right. let's do a review<br>
<br>
P1<br>
---<br>
<br>
B1, B2, B3 - call +1.5V "DRAM_VCC" and +0.75V "DRAM-REF", then put 1<br>
of the capacitors connected directly to the DRAM-REF, and mark it<br>
"keep as close to DDR3 as possible", to remind yourself. joe will<br>
know what value those need to be, but that ref voltage *must* be kept<br>
stable.<br></blockquote><div><br>Uploaded <a href="http://www.iuac.res.in/%7Eelab/phoenix/SBC/">files</a> with changes. JTAG connector to be added.<br><br>Ajith.<br><br></div></div>